US2010026691A1PendingUtilityA1

Method and system for processing graphics data through a series of graphics processors

42
Assignee: YAN MINGPriority: Aug 1, 2008Filed: Sep 30, 2008Published: Feb 4, 2010
Est. expiryAug 1, 2028(~2 yrs left)· nominal 20-yr term from priority
Inventors:Ming Yan
G06T 1/20
42
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Claims

Abstract

One embodiment of the present invention sets forth a computer device that comprises a central processing unit, a system memory, a system interface coupled to the central processing unit, wherein the system interface includes at least one connector slot, and a high-performance graphics processing system coupled to the connector slot of the system interface. The high-performance graphics processing system further comprises a plurality of graphics processing units that includes a first graphics processing unit coupled to a set of first data lanes of the connector slot from which the multiprocessor graphics system receives data to process, and a second graphics processing unit coupled to a set of second data lanes of the connector slot through which the multiprocessor graphics system outputs processed data.

Claims

exact text as granted — not AI-modified
1 . A computer device comprising:
 a central processing unit;   a system memory;   a system interface coupled to the central processing unit, wherein the system interface includes at least one connector slot; and   a high-performance graphics processing system coupled to the connector slot of the system interface, wherein the high-performance graphics processing system comprises a plurality of graphics processing units comprising:
 a first graphics processing unit coupled to a set of first data lanes of the connector slot from which the multiprocessor graphics system receives data to process, and 
 a second graphics processing unit coupled to a set of second data lanes of the connector slot through which the multiprocessor graphics system outputs processed data. 
   
   
   
       2 . The computer device of  claim 1 , wherein the high-performance graphics processing system comprises a third graphics processing unit coupled between the first and second graphics processing unit. 
   
   
       3 . The computer device of  claim 1 , wherein the system interface includes a Peripheral Component Interconnect Express (PCIE) bus. 
   
   
       4 . The computer device of  claim 1 , further comprising a low-performance graphics processing system coupled between the high-performance graphics system and a display device. 
   
   
       5 . The computer device of  claim 4 , wherein the low-performance graphics processor system is configured to receive processed graphics data from the second processing unit for presentation on the display device. 
   
   
       6 . The computer device of  claim 4 , wherein the high-performance graphics processing system is configured to process graphics data either in a pipeline-processing mode of operation or a parallel-processing mode of operation. 
   
   
       7 . The computer device of  claim 6 , wherein the high-performance graphics processing system in the pipeline-processing mode is configured to:
 receive graphics data of a first frame to render on the first graphics processing unit;   process a portion of the graphics data on the first graphics processing unit;   transmit an unprocessed portion of the graphics data or the entire graphics data to another graphics processing unit; and   collect the processed portion of the graphics data on the second graphics processing unit.   
   
   
       8 . The computer device of  claim 7 , wherein the first graphics processing unit is configured to receive graphics data of a second frame to render and to process after the portion of graphics data of the first frame has been processed. 
   
   
       9 . The computer device of  claim 6 , wherein the high-performance graphics system in the parallel-processing mode is configured to:
 duplicate graphics data of a first frame to render the graphics data of the first frame on each of the plurality of graphics processing units;   concurrently process a different portion of the graphics data on each of the plurality of graphics processing units; and   collect all the processed portions of graphics data on the second graphics processing unit.   
   
   
       10 . The computer device of  claim 9 , wherein the high-performance graphics system is configured to receive graphics data of a second frame to render after the first frame has been entirely processed. 
   
   
       11 . A method for processing graphics data in a high-performance graphics processing system comprising a plurality of graphics processing units, the method comprising:
 receiving graphics data on a first graphics processing unit in the high-performance graphics processing system that is coupled to a plurality of first data lanes of a connector slot;   processing the graphics data through the graphics processing units within the graphics processor system; and   outputting all processed graphics data through a second processing unit of the high-performance graphics processing system that is coupled to a plurality of second data lanes of the connector slot.   
   
   
       12 . The method of  claim 11 , wherein the step of processing the graphics data through the graphics processing units is performed either in a pipeline-processing mode or a parallel-processing mode. 
   
   
       13 . The method of  claim 12 , wherein the step of processing the graphics data in the pipeline-processing mode comprises:
 receiving graphics data of a first frame to render on the first graphics processing unit;   processing a portion of the graphics data on the first graphics processing unit;   transmitting an unprocessed portion of the graphics data to another one of the graphics processing units; and   collecting all the processed portions of the graphics data on the second graphics processing unit.   
   
   
       14 . The method of  claim 13 , further comprising receiving graphics data of a second frame to render on the first graphics processing unit after the portion of graphics data of the first frame has been processed. 
   
   
       15 . The method of  claim 12 , wherein the step of processing the graphics data in the parallel-processing mode comprises:
 duplicating graphics data of a first frame to render on each of the graphics processing units;   concurrently processing a different portion of the graphics data on each of the graphics processing units; and   collecting all the processed portions of the graphics data on the second graphics processing unit.   
   
   
       16 . The method of  claim 15 , further comprising receiving graphics data of a second frame to render on the first graphics processing unit after the first frame has been entirely processed. 
   
   
       17 . The method of  claim 11 , wherein the connector slot includes a Peripheral Component Interconnect Express (PCIE) connector slot. 
   
   
       18 . The method of  claim 11 , further comprising outputting all processed graphics data from the second processing unit to a low-performance graphics processing system coupled between the high-performance graphics processing system and a display device. 
   
   
       19 . The method of  claim 18  wherein the low-performance graphics processing system is configured to receive the processed graphics data for presentation on the display device. 
   
   
       20 . The method of  claim 11  wherein the high-performance graphics processing system comprises a third graphics processing unit coupled between the first and second graphics processing unit. 
   
   
       21 . A method for processing graphics data in a high-performance graphics processing system comprising a plurality of graphics processing units coupled to one another, the method comprising:
 receiving graphics data of a first frame on a first graphics processing unit of the high-performance graphics processing system;   processing the graphics data through the plurality of graphics processing units according to either a pipeline-processing mode of operation or a parallel-processing mode of operation; and   outputting the processed graphics data of the first frame through a second graphics processing unit of the high-performance graphics processing system;   wherein processing the graphics data according to the pipeline-processing mode of operation comprises:
 processing a portion of the graphics data the first graphics processing unit and transmitting the processed portion of the graphics data and an unprocessed portion of the graphics data or the entire graphics data to a next graphics processing unit. 
   
   
   
       22 . The method of  claim 21 , further comprising receiving graphics data of a second frame to render on the first graphics processing unit after the first graphics processing unit has transmitted the processed portion of graphics data of the first frame to the next graphics processing unit. 
   
   
       23 . The method of  claim 21 , wherein processing the graphics data according to a parallel-processing mode of operation comprises:
 duplicating graphics data of the first frame to render on each of the graphics processing units;   concurrently processing a different portion of the graphics data on each of the graphics processing units; and   collecting all the processed portions of the graphics data on the second graphics processing unit.   
   
   
       24 . The method of  claim 23 , further comprising receiving graphics data of a second frame to render on the first graphics processing unit after the first frame has been entirely processed through the plurality of graphics processing units in the parallel-processing mode. 
   
   
       25 . The method of  claim 21 , wherein the high-performance graphics processing system is coupled to a connector slot. 
   
   
       26 . The method of  claim 25 , wherein the connector slot includes a Peripheral Component Interconnect Express (PCIE) connector slot. 
   
   
       27 . The method of  claim 26 , wherein the step of receiving the graphics data of the first frame on the first graphics processing unit is performed via a plurality of first data lanes of the connector slot that are coupled to the first graphics processing unit. 
   
   
       28 . The method of  claim 26 , wherein the step of outputting the processed graphics data of the first frame through a second graphics processing unit is performed via a plurality of second data lanes of the connector slot that are coupled to the second graphics processing unit. 
   
   
       29 . The method of  claim 26 , wherein the high-performance graphics processing system further comprises a third graphics processing unit coupled between the first and second graphics processing unit, wherein the third graphics processing unit is configured to receive graphics data to process from the first graphics processing unit. 
   
   
       30 . The method of  claim 21 , wherein the step of outputting the processed graphics data of the first frame through the second graphics processing unit further comprising transferring the processed graphics data to a low-performance graphics processing system coupled between the high-performance graphics processing system and a display device.

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