Field Effect Semiconductor Diodes and Processing Techniques

Abstract

Field effect semiconductor diodes and improved processing techniques for forming the field effect semiconductor diodes having semiconductor layers forming a source, a body and a drain of a field effect device, the semiconductor layers forming pedestals having an insulating layer and a gate on sides thereof vertically spanning the body and a part of the source and drain layers, and a conductive contact layer over the pedestals making electrical contact with the drain and the gate, the conductive layer being in contact with the body at least one position on each pedestal. The conductive layer may be in contact with the body through at least one opening in the source layer, or the source layer may be a discontinuous doped layer, the body layer extending between the discontinuous doped layer forming the source layer to be in electrical contact with the conductive layer. Other aspects and variations of the invention are disclosed.

1 - 20 . (canceled) 
     
     
         21 . A method of forming a field effect semiconductor diode, where the diode comprises semiconductor layers on an upper surface of a substrate and forming a source, a body and a drain of a field effect device, the semiconductor layers being stacked vertically and forming pedestals with the drain being the top semiconductor layer, the method comprising:
 using lithographic resist imaging to define regions along a top surface of the body layer substrate where the drain layer to block formation of the drain layer, the drain layer being formed where said resist has been removed.   
     
     
         22 . The method of  claim 21  where the drain layer is doped by ion implantation. 
     
     
         23 . The method of  claim 22  further comprising thermal processing wherein the total lateral diffusion of dopants in the drain layer is insufficient to invert the entire semiconductor region under the resist while doping the drain layer by ion implantation. 
     
     
         24 . A method of forming a field effect semiconductor diode, where the diode comprises semiconductor layers on an upper surface of a substrate and forming a source, a body and a drain of a field effect device, the semiconductor layers being stacked vertically and forming pedestals and the method including:
 an angled ion implantation process which implants dopant into the side regions of the pedestals.   
     
     
         25 . The method of  claim 24  wherein at some time during the implantation step, the angle of the path of the ions is greater than 0 and less than or equal to 15 degrees when compared to a ray perpendicular to the substrate surface. 
     
     
         26 . The method of  claim 24  wherein at some time during the implantation step the angle of the path of the ions is greater than 15 and less than or equal to 30 degrees when compared to a ray perpendicular to the substrate surface. 
     
     
         27 . The method of  claim 24  wherein at some time during the implantation step, the angle of the path of the ions is greater than 30 and less than or equal to 60 degrees when compared to a ray perpendicular to the substrate surface. 
     
     
         28 . A method of forming a field effect semiconductor diode, where the diode comprises semiconductor layers on an upper surface of a substrate and forming a source, a body and a drain of a field effect device, the semiconductor layers being stacked vertically and forming pedestals and the method including:
 forming a starting substrate surface by epitaxially growing silicon upon a silicon substrate.   
     
     
         29 . The method of  claim 28  wherein the epitaxially grown silicon is doped to be P-Type. 
     
     
         30 . A method of forming a field effect semiconductor diode, where the diode comprises semiconductor layers on an upper surface of a substrate and forming a source, a body and a drain of a field effect device, the semiconductor layers being stacked vertically and forming pedestals and the method including:
 forming an electrical contact layer by depositing titanium metal.   
     
     
         31 . The method of  claim 30  further comprising thermally heating the deposited titanium until it reacts with the underlying silicon surfaces.