System and method for im3 reduction and cancellation in amplifiers

Abstract

Sets of power amplifier branches (which comprise an RF/microwave amplifier stage) are power combined within each stage and each set of power amplifier branches are biased in different classes of operation by bias circuits possessing different impedance characteristics such that the fundamental frequency components present at the output are in-phase with one another and the IMD3 components are anti-phase over a broad range of power levels. The RF input signal is provided by the output of the previous stage of the RF/microwave amplifier. The output of each stage is formed by power combining sets of these power amplifier branches, each of which are separately biased, so the fundamental components are additive resulting in the maximum possible output power and the IM3 components cancel partially or completely. IM3 reduction or cancellation can be achieved over a large range of output powers with the use of a feed forward control loop monitoring the input power and appropriately adjusting the bias currents and impedance characteristics of the bias circuits feeding the individual power amplifier branches in each stage of the RF/microwave amplifier.

1 . A discrete amplifier for canceling at least one distortion component at the output of the discrete amplifier comprising at least a first stage and a second stage:
 a. said first stage having at least a first branch and a second branch in parallel with one another, wherein
 said first stage first branch operates in a first mode of operation, and 
 said first stage second branch operates in a second mode of operation; 
   b. said second stage having at least a third branch and a fourth branch in parallel with one another, wherein
 said second stage third branch operates in a third mode of operation, and 
 said second stage fourth branch operates in a fourth mode of operation; 
   wherein one of said first, said second, said third and said forth modes of operation differs from another one of said first, said second, said third and said forth modes of operation so that at least one distortion component is substantially canceled at an output of said second stage.   
     
     
         2 . The discrete amplifier of  claim 1 , further comprising:
 a. a first biasing circuit operatively coupled to said first branch for operating said first branch in said first mode;   b. a second biasing circuit operatively coupled to said second branch for operating said second branch in said second mode;   c. a third biasing circuit operatively coupled to said third branch for operating said third branch in said third mode; and   d. a fourth biasing circuit operatively coupled to said fourth branch for operating said fourth branch in said fourth mode.   
     
     
         3 . The discrete amplifier of  claim 2 , wherein one of a first impedance and a first biasing level of said first biasing circuit differs from one of a second impedance and a second biasing level of said second biasing circuit. 
     
     
         4 . The discrete amplifier of  claim 2 , wherein
 a. one of an impedance and a biasing level of said first biasing circuit differs from one of an impedance and a biasing level of said second biasing circuit, and   b. one of an impedance and a biasing level of said third biasing circuit differs from one of an impedance and a biasing level of said fourth biasing circuit,   
       and chosen so as to maximize the cancellation of said at least one distortion component at said output of said second stage of said discrete amplifier. 
     
     
         5 . The discrete amplifier of  claim 1 , wherein each of said first, said second, said third and said fourth branches are formed from a plurality of transistor legs. 
     
     
         6 . The discrete amplifier of  claim 5 , wherein each of said plurality of transistor legs in said first, said second, said third and said fourth branches are formed from a plurality of unit cells coupled in parallel with one another. 
     
     
         7 . The discrete amplifier of  claim 6 , further comprising a sensing circuit that senses an input power to said discrete amplifier and causes a size of at least one of said first branch, said second branch, said third branch and said fourth branch to either increase or decrease depending on said sensed input power. 
     
     
         8 . The discrete amplifier of  claim 7 , wherein said size of said at least one of said first branch, said second branch, said third branch and said fourth branch is decreased by turning off at least one of said plurality of transistor legs in said one of said first branch, said second branch, said third branch and said fourth branch. 
     
     
         9 . The discrete amplifier of  claim 7 , wherein said size of said at least one of said first branch, said second branch, said third branch and said fourth branch is decreased by turning off a portion of at least one transistor leg in said at least one of said first branch, said second branch, said third branch and said fourth branch. 
     
     
         10 . The discrete amplifier of  claim 1 , wherein said at least one distortion component is a inter-modulation distortion component. 
     
     
         11 . A discrete amplifier for canceling at least one distortion component at the output of the discrete amplifier comprising at least a first stage and a second stage:
 a. a first stage having at least a first branch and a second branch in parallel with one another, wherein
 each of said first and second branches is formed of at least one transistor leg having one or more unit cells in parallel with one another, 
 said first stage first branch operates in a first mode of operation, and 
 said first stage second branch operates in a second mode of operation; 
   b. a second stage having at least a third branch and a fourth branch in parallel with one another, wherein
 each of said third and fourth branches is formed of at least one transistor leg having one or more unit cells in parallel with one another, 
 said second stage third branch operates in a third mode of operation, and 
 said second stage fourth branch operates in a fourth mode of operation; 
   c. a sensing circuit that senses an input power to said discrete amplifier and causes a size of at least one of said first branch, said second branch, said third branch and said fourth branch to either increase or decrease depending on said sensed input power;   wherein one of said first, said second, said third and said forth modes of operation differs from another one of said first, said second, said third and said forth modes of operation so that at least one distortion component is substantially canceled at an output of said second stage.   
     
     
         12 . The discrete amplifier of  claim 11 , wherein said size of said at least one of said first branch, said second branch, said third branch and said fourth branch is decreased by turning off at least one of said at least one of said transistor legs in said first branch, said second branch, said third branch and said fourth branch. 
     
     
         13 . The discrete amplifier of  claim 11 , wherein said size of said at least one of said first branch, said second branch, said third branch and said fourth branch is decreased by turning off a portion of at least one of said at least one transistor leg in said first branch, said second branch, said third branch and said fourth branch. 
     
     
         14 . The discrete amplifier of  claim 11 , wherein said at least one distortion component is a inter-modulation distortion component. 
     
     
         15 . The discrete amplifier of  claim 11 , further comprising
 a. a first biasing circuit operatively coupled to said first branch for operating said first branch in said first mode;   b. a second biasing circuit operatively coupled to said second branch for operating said second branch in said second mode;   c. a third biasing circuit operatively coupled to said third branch for operating said third branch in said third mode; and   d. a fourth biasing circuit operatively coupled to said fourth branch for operating said fourth branch in said fourth mode.   
     
     
         16 . The discrete amplifier of  claim 15 , wherein one of a first impedance and a first biasing level of said first biasing circuit differs from one of a second impedance and a second biasing level of said second biasing circuit. 
     
     
         17 . The discrete amplifier of  claim 15 , wherein
 a. one of an impedance and a biasing level of said first biasing circuit differs from one of an impedance and a biasing level of said second biasing circuit, and   b. one of an impedance and a biasing level of said third biasing circuit differs from one of an impedance and a biasing level of said fourth biasing circuit,   
       and chosen so as to maximize the cancellation of said at least one distortion component at said output of said second stage of said discrete amplifier.