Method and system for memory address translation and pinning

Abstract

A method and system for memory address translation and pinning are provided. The method includes attaching a memory address space identifier to a direct memory access (DMA) request, the DMA request is sent by a consumer and using a virtual address in a given address space. The method further includes looking up for the memory address space identifier to find a translation of the virtual address in the given address space used in the DMA request to a physical page frame. Provided that the physical page frame is found, pinning the physical page frame as long as the DMA request is in progress to prevent an unmapping operation of said virtual address in said given address space, and completing the DMA request, wherein the steps of attaching, looking up and pinning are centrally controlled by a host gateway.

1 .- 4 . (canceled) 
   
   
       5 . A computer-implemented method for a centralized memory address translation and pinning, said method comprising:
 attaching a memory address space identifier to a direct memory access (DMA) request, said DMA request is sent by a consumer and using a virtual address in a given address space;   looking up for said memory address space identifier to find a translation of said virtual address in said given address space used in said DMA request to a physical page frame;   provided that said physical page frame is found, pinning said physical page frame as long as said DMA request is in progress to prevent an unmapping operation of said virtual address in said given address space; and   completing said DMA request, wherein said steps of attaching, looking up and pinning are centrally controlled by a host gateway, wherein said DMA request includes at least an identification of said consumer, a virtual address in the address space of said consumer, and a length of said DMA request.   
   
   
       6 . The method of  claim 5 , wherein said looking up further comprises looking up in page tables located in the memory of said consumer. 
   
   
       7 . The method of  claim 5 , wherein said looking up further comprises looking up in translation control entries (TCE) tables located in device controllers coupled with IO devices for which said DMA request is requested, said TCE tables hold records of page entries coupled with said IO devices and virtual addresses corresponding to said page entries. 
   
   
       8 .- 12 . (canceled) 
   
   
       13 . A computer-implemented method for communicating an unmap operation of a virtual address in a virtual memory address space, said method comprising:
 marking that said virtual address is intended to be unmapped;   sending an address space identifier and said virtual address of said virtual address space to determine whether said virtual address can be unmapped; and   determining whether said virtual address can be unmapped.   
   
   
       14 . The method of  claim 13 , wherein if said virtual address can be unmapped, said method further comprises unmapping said virtual address. 
   
   
       15 . The method of  claim 13 , wherein if said virtual address cannot be unmapped, said method further comprises aborting said unmap operation. 
   
   
       16 . The method of  claim 13 , wherein if said virtual address cannot be unmapped, said method further comprises retrying to unmap said virtual address after a waiting period. 
   
   
       17 . A system for a centralized memory address translation and pinning, said system comprising:
 a host gateway arranged to attach a memory address space identifier to a direct memory access (DMA) request, said DMA request is sent by a consumer and using a virtual address space;
 a second component arranged to look up for said memory address space identifier to find a translation of said virtual address space used in said DMA request to a physical page frame; and 
   a third component arranged to pin said physical page frame as long as said DMA request is in progress to prevent an unmapping operation of said physical page frame, wherein said second and third components are centrally controlled by said host gateway.   
   
   
       18 . The system of  claim 17 , wherein said DMA request includes at least an identification of said consumer, a virtual address in the address space of said consumer, and a length of said DMA request. 
   
   
       19 . The system of  claim 17 , wherein second component is further arranged to look up in page tables located in the memory of said consumer. 
   
   
       20 . The system of  claim 17 , wherein said third component is further arranged to mark to a hypervisor or an operating system that said physical page frame involved in said DMA request prevent said hypervisor or operating system from mapping said physical page frame to a different task. 
   
   
       21 . The system of  claim 17 , wherein said host gateway is integrated with a memory management unit (MMU) of a processing unit. 
   
   
       22 . The system of  claim 17 , further comprises a device controller (DC) arranged to control one or more IO devices that are coupled with said DC. 
   
   
       23 . The system of  claim 22 , wherein said DC is further arranged to keep at least one translation control entries (TCE) table to hold records of page entries coupled with said IO devices and virtual addresses □orresponding to said page entries. 
   
   
       24 . The system of  claim 23 , wherein said DMA request includes at least an identification of said consumer, a virtual address of the address space of said consumer and a page entry coupled with said consumer in the form of a TCE record, a length of said DMA request, and a mapping ID of said DMA request. 
   
   
       25 . The system of  claim 23 , wherein said TCE record is further used by said host gateway to verify and translate a virtual address for a mapping operation. 
   
   
       26 . The system of  claim 23 , wherein said host gateway is further arranged to update said TCE table when said memory address space identifier is missing from said TCE table. 
   
   
       27 . A computer software product, including a computer-readable medium in which computer program instructions are stored, which instructions, when read by a computer, cause the computer to perform a method for a centralized memory address translation and pinning, said method comprising:
 attaching a memory address space identifier to a direct memory access (DMA) request, said DMA request is sent by a consumer and using a virtual address in a virtual address space;   looking up for said memory address space identifier to find a translation of said virtual address in said virtual address space used in said DMA request to a physical page frame;   provided that said physical page frame is found, pinning said physical page frame as long as said DMA request is in progress to prevent an unmapping operation of said virtual addressing said given address space; and   completing said DMA request, wherein said steps of attaching, looking up and pinning are centrally controlled by a host gateway.   
   
   
       28 . The method of  claim 27 , wherein said looking up further comprises looking up in page tables located in the memory of said consumer. 
   
   
       29 . The method of  claim 27 , wherein said looking up further comprises looking up in translation control entries (TCE) tables located in device controllers coupled with IO devices for which said DMA request is requested, said TCE tables hold records of page entries coupled with said IO devices and virtual addresses □orresponding to said page entries. 
   
   
       30 . The method of  claim 27 , wherein if said physical page frame is not found in said step of looking up, said method further comprises raising an IO miss interrupt call to a hypervisor or an operating system to establish said translation. 
   
   
       31 . The method of  claim 27 , wherein said pinning further comprises marking to said hypervisor or said operating system that said physical page frame involved in said DMA request prevent said hypervisor or operating system from mapping said physical page frame to a different task. 
   
   
       32 . The method according to  claim 29 , further comprising using said TCE record is to verify and translate a virtual address for a mapping operation. 
   
   
       33 . The method of  claim 29 , further comprises updating said TCE table when said memory address space identifier is missing from said TCE table.