Dragonfly processor interconnect network

Abstract

A multiprocessor computer system comprises a dragonfly processor interconnect network that comprises a plurality of processor nodes, a plurality of routers, each router directly coupled to a plurality of terminal nodes, the routers coupled to one another and arranged into a group, and a plurality of groups of routers, such that each group is connected to each other group via at least one direct connection.

1 . A multiprocessor computer system comprising a dragonfly processor interconnect network, the dragonfly processor interconnect network comprising:
 a plurality of processor nodes;   a plurality of routers, each router directly coupled to a plurality of terminal nodes, the routers coupled to one another and arranged into a group,   and a plurality of groups of routers, such that each group is connected to each other group via at least one direct connection.   
   
   
       2 . The multiprocessor computer system of  claim 1 , wherein each group acts as virtual router with radix of approximately  2  times the square root of the number of nodes in the network. 
   
   
       3 . The multiprocessor computer system of  claim 1 , wherein the virtual radix of each group is the product of the number of routers in each group times the sum of the number of processor nodes connected to each router plus the number of global channels 
   
   
       4 . The multiprocessor computer system of  claim 1 , wherein the number of routers per group is equal to twice the number of processor nodes per router, and wherein the number of processor nodes per router is equal to the number of channels per router connected to other groups. 
   
   
       5 . The multiprocessor computer system of  claim 1 , wherein the number of routers in a group is greater than twice the number of global channels per router. 
   
   
       6 . The multiprocessor computer system of  claim 1 , wherein the number of processor nodes per router is greater than the number of global channels per router. 
   
   
       7 . The multiprocessor computer system of  claim 1 , wherein the routers within a group are connected via a flattened butterfly network. 
   
   
       8 . The multiprocessor computer system of  claim 1 , wherein the routers route data using selective virtual channel discrimination. 
   
   
       9 . The multiprocessor computer system of  claim 1 , wherein the routers route data using credit round-trip latency as an indicator of channel congestion. 
   
   
       10 . A method of operating a multiprocessor computer system, comprising:
 communicating a message from a processor node to a router, the router coupled to a plurality of processor nodes;   communicating the message between two or more routers, the routers coupled to one another and arranged into a group, and   communicating the data between two groups of routers, such that each group is connected to each other group via at least one direct connection.   
   
   
       11 . The method of operating a multiprocessor computer system of  claim 1 , wherein each group acts as virtual router with radix of approximately  2  times the square root of the number of nodes in the network. 
   
   
       12 . The method of operating a multiprocessor computer system of  claim 1 , wherein the virtual radix of each group is the product of the number of routers in each group times the sum of the number of processor nodes connected to each router plus the number of global channels 
   
   
       13 . The method of operating a multiprocessor computer system of  claim 1 , wherein the number of routers per group is equal to twice the number of processor nodes per router, and wherein the number of processor nodes per router is equal to the number of channels per router connected to other groups. 
   
   
       14 . The method of operating a multiprocessor computer system of  claim 1 , wherein the number of routers in a group is greater than twice the number of global channels per router. 
   
   
       15 . The method of operating a multiprocessor computer system of  claim 1 , wherein the number of processor nodes per router is greater than the number of global channels per router. 
   
   
       16 . The method of operating a multiprocessor computer system of  claim 1 , wherein the routers within a group are connected via a flattened butterfly network. 
   
   
       17 . The method of operating a multiprocessor computer system of  claim 1 , wherein the routers route data using selective virtual channel discrimination. 
   
   
       18 . The method of operating a multiprocessor computer system of  claim 1 , wherein the routers route data using credit round-trip latency as an indicator of channel congestion. 
   
   
       19 . A multiprocessor computer system, comprising a Dragonfly processor interconnect network. 
   
   
       20 . A method of communicating data between processing nodes in a multiprocessor computer system, comprising routing the data over a Dragonfly processor interconnect network.