Semiconductor device and method for fabricating the same

Abstract

Provided are a semiconductor device and a fabricating method thereof. The semiconductor device includes a substrate having a trench that defines an active region, an isolation layer that buries the trench, a pro-oxidant region formed at an upper corner portion of the trench to enhance oxidation at the upper corner portion of the trench when a gate insulation layer is grown on the active region, and a gate conductive layer formed on the gate insulation layer.

1 . A semiconductor device, comprising:
 a substrate having a trench that defines an active region;   an isolation layer that buries the trench;   a pro-oxidant region formed at an upper corner portion of the trench to enhance oxidation at the upper corner portion of the trench when a gate insulation layer is grown on the active region; and   a gate conductive layer formed on the gate insulation layer.   
     
     
         2 . The semiconductor device of  claim 1 , wherein the pro-oxidant region is formed by implanting impurity ions having a conductive type identical to the substrate. 
     
     
         3 . The semiconductor device of  claim 2 , wherein the pro-oxidant region is formed at concentration higher than the substrate. 
     
     
         4 . The semiconductor device of  claim 3 , wherein the pro-oxidant region is formed by implanting one selected from the group consisting of boron ion (B), phosphorus ion (P), and arsenic ion (As). 
     
     
         5 . The semiconductor device of  claim 1 , wherein the pro-oxidant region is formed by implanting impurities having a conductive type different from the substrate. 
     
     
         6 . The semiconductor device of  claim 1 , wherein the active region has a box type. 
     
     
         7 . The semiconductor device of  claim 6 , wherein the gate conductive layer is formed in a direction crossing the active region. 
     
     
         8 . The semiconductor device of  claim 7 , wherein the pro-oxidant region is formed to surround the active regions. 
     
     
         9 . The semiconductor device of  claim 8 , wherein the pro-oxidant region is formed in the active region and the isolation layer. 
     
     
         10 . The semiconductor device of  claim 7 , wherein the pro-oxidant region is formed in a bar type at a region where the gate conductive layer overlaps with the active region. 
     
     
         11 . The semiconductor device of  claim 10 , wherein the pro-oxidant region is formed in the active region and the isolation layer. 
     
     
         12 . The semiconductor device of  claim 10 , wherein the pro-oxidant region is formed in the active region, not in the isolation layer. 
     
     
         13 . The semiconductor device of  claim 1 , further comprising a sidewall passivation layer formed by oxidizing an inner side of the trench between the trench and the isolation layer. 
     
     
         14 . The semiconductor device of  claim 13 , wherein the pro-oxidant region is formed in the sidewall passivation layer between the active region and the isolation layer. 
     
     
         15 . The semiconductor device of  claim 15 , wherein the isolation layer is formed to be lower than a top surface of the substrate. 
     
     
         16 . A method for fabricating a semiconductor device, comprising:
 defining an active region by forming a trench in a substrate;   forming an isolation layer in the trench;   forming a pro-oxidant region at an upper corner portion of the trench;   forming a gate insulation layer by oxidizing the active region; and   forming a gate conductive layer on the gate insulation layer.   
     
     
         17 . The method of  claim 16 , wherein the pro-oxidant region is formed by implanting impurities having a conductive type identical to the substrate. 
     
     
         18 . The method of  claim 17 , wherein the pro-oxidant region is formed at concentration higher than the substrate. 
     
     
         19 . The method of  claim 18 , wherein the pro-oxidant region is formed by implanting one selected from the group consisting of boron ion (B), phosphorus ion (P), and arsenic ion (As). 
     
     
         20 . The method of  claim 16 , wherein the pro-oxidant region is formed by implanting impurities having a conductive type different from the substrate. 
     
     
         21 . The method of  claim 16 , wherein the active region is formed in a box type. 
     
     
         22 . The method of  claim 16 , wherein the gate conductive layer is formed in a direction crossing the active region. 
     
     
         23 . The method of  claim 22 , wherein the pro-oxidant region is formed to surround the active region. 
     
     
         24 . The method of  claim 23 , wherein the pro-oxidant region is formed in the active region and the isolation layer. 
     
     
         25 . The method of  claim 16 , wherein the pro-oxidant region is formed in a bar type at a region where the gate conductive layer overlaps with the active region. 
     
     
         26 . The method of  claim 25 , wherein the pro-oxidant region is formed in the active region and the isolation layer. 
     
     
         27 . The method of  claim 25 , wherein the pro-oxidant region is formed in the active region, not in the isolation layer. 
     
     
         28 . The method of  claim 16 , further comprising forming a sidewall passivation layer by oxidizing an inner side of the trench after said defining an active region. 
     
     
         29 . The method of  claim 28 , wherein the pro-oxidant region is formed in the sidewall passivation layer between the active region and the isolation layer. 
     
     
         30 . The method of  claim 16 , wherein the isolation layer is formed to be lower than a top surface of the substrate.