US2010081257A1PendingUtilityA1

Dice by grind for back surface metallized dies

Individually held — no corporate assignee on recordPriority: Apr 16, 2008Filed: Nov 24, 2009Published: Apr 1, 2010
Est. expiryApr 16, 2028(~1.7 yrs left)· nominal 20-yr term from priority
H10P 54/00
47
PatentIndex Score
0
Cited by
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Claims

Abstract

Semiconductor device processing and methods for dicing a semiconductor wafer into a plurality of individual dies that can have back surface metallization are described. The methods comprise providing a wafer with pre-diced streets in the wafer's front surface, applying a sidewall masking mechanism to the front surface of the wafer so as to substantially fill the pre-diced streets, thinning the back surface of the wafer so as to dice the wafer (e.g., by grinding, etching, or both) and expose a portion of the sidewall masking mechanism from the back surface of the wafer, and applying a material, such as metal, to the back surface of the diced wafer. These methods can prevent the metal from being deposited on die sidewalls and may allow the separation of individual dies without causing the metal to peel from the back surface of one or more adjacent dies. Other embodiments are also described.

Claims

exact text as granted — not AI-modified
1 . A method for dicing a semiconductor wafer, comprising:
 providing a semiconductor wafer with a back surface and a front surface with pre-diced streets that partially penetrate the wafer;   providing a sidewall mask that substantially fills the pre-diced streets;   dicing the wafer into individual dies with sidewalls by removing a portion of the back surface of the wafer; and   depositing a material on the back surface of the diced wafer, wherein the sidewall mask prevents the material from being deposited on the sidewalls.   
   
   
       2 . The method of  claim 1 , wherein removing the portion of the back surface comprises an etching process. 
   
   
       3 . The method of  claim 2 , wherein the etching process thins the wafer to a thickness ranging from about 0.1 micrometer and about 100 micrometers of a final wafer target thickness. 
   
   
       4 . The method of  claim 2 , wherein the etching process thins the wafer to a thickness ranging from about 1 micrometer and about 20 micrometers of the final wafer target thickness. 
   
   
       5 . The method of  claim 2 , wherein the etching process thins the wafer to a thickness ranging from about 5 micrometers and about 10 micrometers of the final wafer target thickness. 
   
   
       6 . The method of  claim 1 , wherein removing a portion of the back surface of wafer does not expose the sidewall mask. 
   
   
       7 . The method of  claim 1 , wherein the material deposited on the back surface of the diced wafer comprises a metal. 
   
   
       8 . The method of  claim 1 , wherein the sidewall mask comprises an adhesive. 
   
   
       9 . (canceled) 
   
   
       10 . (canceled) 
   
   
       11 . (canceled) 
   
   
       12 . (canceled) 
   
   
       13 . (canceled) 
   
   
       14 . (canceled) 
   
   
       15 . (canceled) 
   
   
       16 . (canceled) 
   
   
       17 . (canceled) 
   
   
       18 . (canceled) 
   
   
       19 . (canceled) 
   
   
       20 . (canceled) 
   
   
       21 . (canceled) 
   
   
       22 . (canceled) 
   
   
       23 . (canceled) 
   
   
       24 . The method of  claim 1 , wherein the sidewall mask comprises a plastic, a polymer, a photoresist, a thermal paste, or combinations thereof. 
   
   
       25 . A method for dicing a semiconductor wafer, comprising:
 providing a semiconductor wafer with a back surface and a front surface with pre-diced streets that partially penetrate the wafer;   providing a sidewall mask comprising an adhesive in the pre-diced streets;   dicing the wafer into individual dies with sidewalls by etching a portion of the back surface of the wafer; and   depositing a material on the back surface of the diced wafer, wherein the sidewall mask prevents the material from being deposited on the sidewalls.   
   
   
       26 . The method of  claim 25 , wherein the etching process thins the wafer to a thickness ranging from about 5 micrometers and about 10 micrometers of the final wafer target thickness. 
   
   
       27 . The method of  claim 25 , wherein the etching process does not expose the sidewall mask. 
   
   
       28 . The method of  claim 25 , wherein the material deposited on the back surface of the diced wafer comprises a metal. 
   
   
       29 . The method of  claim 25 , wherein the sidewall mask substantially fills the pre-diced streets. 
   
   
       30 . A method for dicing a semiconductor wafer, comprising:
 providing a semiconductor wafer with a back surface and a front surface with pre-diced streets that partially penetrate the wafer;   providing a sidewall mask in the pre-diced streets;   dicing the wafer into individual dies with sidewalls by etching a portion of the back surface of the wafer without exposing the sidewall mask; and   depositing a material on the back surface of the diced wafer, wherein the sidewall mask prevents the material from being deposited on the sidewalls.   
   
   
       31 . The method of  claim 30 , wherein the etching process thins the wafer to a thickness ranging from about 1 micrometer and about 20 micrometers of the final wafer target thickness. 
   
   
       32 . The method of  claim 30 , wherein the etching process thins the wafer to a thickness ranging from about 5 micrometers and about 10 micrometers of the final wafer target thickness. 
   
   
       33 . The method of  claim 30 , wherein the material deposited on the back surface of the diced wafer comprises a metal. 
   
   
       34 . The method of  claim 30 , wherein the sidewall mask substantially fills the pre-diced streets. 
   
   
       35 . The method of  claim 30 , wherein the sidewall mask comprises an adhesive, a plastic, a polymer, a photoresist, a thermal paste, or combinations thereof. 
   
   
       36 . The method of  claim 35 , wherein the sidewall mask comprises an adhesive.

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