US2010103578A1PendingUtilityA1

Electrical stress protection apparatus and method of manufacture

Assignee: HVVI SEMICONDUCTORS INCPriority: Aug 25, 2006Filed: Jan 6, 2010Published: Apr 29, 2010
Est. expiryAug 25, 2026(~0.1 yrs left)· nominal 20-yr term from priority
H10D 89/713
43
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Claims

Abstract

In various embodiments, circuits and semiconductor devices and structures and methods to manufacture these structures and devices are disclosed. In one embodiment, a bidirectional polarity, voltage transient protection device is disclosed. The voltage transient protection device may include a bipolar PNP transistor having a turn-on voltage of V BE1 , a bipolar NPN transistor having a turn-on voltage of V BE2 , and a field effect transistor (FET) having a threshold voltage of V TH , wherein a turn-on voltage V TO of the voltage transient protection device is approximately equal to the sum of V BE1 , V BE2 , and V TH , that is, V TO ≅V BE1 +V BE2 +V TH . Other embodiments are described and claimed.

Claims

exact text as granted — not AI-modified
1 - 140 . (canceled) 
     
     
         141 . A voltage stress protection circuit, comprising:
 a semiconductive substrate; and   a clamp circuit formed on the substrate and having first and second conductors, the clamp circuit being configured to provide a clamp voltage of about seven volts or less with respect to a voltage difference between the first and second conductors, the clamp circuit including clamping characteristics that are symmetric about a predetermined voltage, wherein the clamp circuit comprises a five-layer NPNPN structure.   
     
     
         142 . The voltage stress protection circuit of  claim 141 , wherein the clamp circuit comprises five layers of doped semiconductive material. 
     
     
         143 . The voltage stress protection circuit of  claim 141 , wherein the first conductor of the clamp circuit is capacitively isolated from the substrate via a structure having a dielectric constant of 3.9 or less.

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