Boost Mechanism Using Driver Current Adjustment for Switching Phase Improvement

Abstract

System and method for providing a boost current to a switching transistor gate is disclosed. A boost capacitor precharged to a voltage level above a gate-source voltage is coupled to a switching transistor gate at the beginning of a switch-on phase. The boost capacitor is decoupled from the switching transistor gate when a boost capacitor voltage falls below the gate-source voltage and is again precharged to the voltage level above the gate-source voltage. A second-phase resistance is coupled between a supply voltage and the switching transistor gate. The second-phase resistance value is selected based upon a current peak detected in the switching transistor. A switch-off capacitor precharged to a voltage level below the gate-source voltage may be coupled to the switching transistor gate at the beginning of a switch-of phase.

1 . A method for providing a boost current to a switching transistor gate, comprising:
 precharging a boost capacitor to a voltage level above a gate-source voltage;   coupling the boost capacitor to the switching transistor gate at the beginning of a switch-on phase; and   decoupling the boost capacitor from the switching transistor gate when a boost capacitor voltage falls to or below the gate-source voltage.   
   
   
       2 . The method of  claim 1 , further comprising:
 precharging the boost capacitor again to the voltage level above the gate-source voltage after the decoupling step and before a subsequent switch-on phase.   
   
   
       3 . The method of  claim 1 , further comprising:
 coupling a second-phase resistance between a supply voltage and the switching transistor gate, a value of the second-phase resistance selected based upon a desired current level to be applied to the switching transistor gate during the switch-on phase.   
   
   
       4 . The method of  claim 3 , wherein the second-phase resistance is coupled between a supply voltage and the switching transistor gate when the boost capacitor is coupled to the switching transistor gate. 
   
   
       5 . The method of  claim 3 , wherein the second-phase resistance is coupled between a supply voltage and the switching transistor gate when the boost capacitor is decoupled from the switching transistor gate. 
   
   
       6 . The method of  claim 3 , further comprising:
 selecting the value of the second-phase resistance based upon detection of a current peak in the switching transistor.   
   
   
       7 . The method of  claim 6 , wherein the current peak in the switching transistor is detected by analyzing a negative gradient of a current level in the switching transistor. 
   
   
       8 . The method of  claim 1 , further comprising:
 precharging a switch-off capacitor to a voltage level below the gate-source voltage;   coupling the switch-off capacitor to the switching transistor gate at the beginning of a switch-of phase; and   decoupling the switch-off capacitor from the switching transistor gate when a switch-off capacitor voltage rises to or above the gate-source voltage.   
   
   
       9 . The method of  claim 8 , further comprising:
 precharging the switch-off capacitor again to the voltage level below the gate-source voltage after the decoupling step and before a subsequent switch-off phase.   
   
   
       10 . The method of  claim 8 , further comprising:
 coupling a second-phase resistance between a supply voltage and the switching transistor gate during a switch-off phase, a value of the second-phase resistance selected based upon a desired current level to be applied to the switching transistor gate during the switch-off phase.   
   
   
       11 . A method of adjusting a gate driver current, comprising:
 monitoring a current through a switching transistor to identify a peak current and a load current;   determining a current differential between the peak current and the load current;   comparing the current differential to one or more reference levels; and   adjusting the gate driver current based upon the relationship of the current differential to the one or more reference levels.   
   
   
       12 . The method of  claim 11 , wherein the current differential corresponds to a negative gradient in a current value over time. 
   
   
       13 . The method of  claim 11 , further comprising:
 filtering the results of the comparison step before adjusting the gate driver current.   
   
   
       14 . The method of  claim 13 , wherein the filtering is a low pass filter or a decimation filter. 
   
   
       15 . The method of  claim 11 , further comprising:
 decreasing the gate driver current if the current differential is above a top reference level.   
   
   
       16 . The method of  claim 11 , further comprising:
 increasing the gate driver current if the current differential is below a lower reference level.   
   
   
       17 . The method of  claim 11 , further comprising:
 maintaining a current gate driver current if the current differential is between an upper reference level and a lower reference level.   
   
   
       18 . A driver for a switching transistor, the controller comprising:
 a first capacitor coupled to a control node through a first switch, the control node configured to be coupled to the switching transistor;   a first precharge circuit coupled to the first capacitor;   a first resistor coupled to a first reference voltage through a second switch;   a controller configured to:
 close the first switch during a first phase of operation, 
 after the first phase of operation when a voltage of the first capacitor crosses a first voltage threshold, open the first switch and close the second during a second phase of operation, and 
 couple the precharge circuit to the first capacitor when the first switch is open. 
   
   
   
       19 . The controller of  claim 18 , further comprising:
 a second capacitor coupled to the control node through a third switch; and   a second precharge circuit coupled to the second capacitor, wherein the controller is further configured to open the second switch and close the third switch during a third phase of operation after the second phase of operation, the third phase of operation comprising a switching transistor turn-off phase.   
   
   
       20 . The controller of  claim 18 , further comprising the switching transistor comprising a gate coupled to the control node.