Video processing ciucuit and related method for merging video output streams with graphical stream for transmission

Abstract

A video processing circuit includes a video generating unit for generating a video output stream, a graphic generating unit for providing a graphical stream, and a communication interface circuit coupled to the video generating unit and the graphic generating unit. The communication interface circuit has a first mode provided for mixing the video output stream and the graphical stream to transmit a mixed video output stream through a channel and a second mode provided for merging the video output stream and the graphical stream to transmit a first merged signal through the channel. In the second mode, the communication interface circuit merges the video output stream and the graphical stream by increasing a working frequency of the communication interface circuit to increase bandwidths of the channel, using positions for transmitting a portion of video control signals in the video output stream to transmit the graphical stream, and compressing the video output stream.

1 . A video processing circuit, comprising:
 a video generating unit for generating a video output stream according to a video input stream;   a graphic generating unit for providing a graphical stream; and   a communication interface circuit, coupled to the video generating unit and the graphic generating unit, the communication interface circuit having a first mode provided for mixing the video output stream and the graphical stream to transmit a mixed video output stream through a channel and a second mode provided for merging the video output stream and the graphical stream to transmit a first merged signal through the channel, wherein the mixed video output stream is generated by combining contents of the video output stream and the graphical stream and the first merged signal is generated by putting the video output stream and the graphical stream in the channel.   
   
   
       2 . The video processing circuit of  claim 1 , further comprising:
 a video output device, coupled to the communication interface circuit, for receiving the mixed video output stream through the channel in the first mode; or   a post-processing device, coupled to the communication interface circuit, for receiving the first merged signal through the channel in the second mode.   
   
   
       3 . The video processing circuit of  claim 1 , wherein in the second mode, the communication interface circuit merges the video output stream and the graphical stream by increasing a working frequency of the communication interface circuit to increase a bandwidth of the channel. 
   
   
       4 . The video processing circuit of  claim 1 , wherein in the second mode, the communication interface circuit merges the video output stream and the graphical stream by using positions for transmitting a portion of video control signals in the video output stream to transmit the graphical stream. 
   
   
       5 . The video processing circuit of  claim 1 , wherein in the second mode, the communication interface circuit merges the video output stream and the graphical stream by compressing the video output stream. 
   
   
       6 . The video processing circuit of  claim 5 , wherein the communication interface circuit compresses the video output stream by:
 transferring the video output stream from a first color depth format to a second color depth format;   replacing actual color values of the video output stream with color indexes of the video output stream; or   transferring the video output stream into a packet format.   
   
   
       7 . The video processing circuit of  claim 1 , wherein the communication interface circuit is a low voltage differential signal (LVDS) interface circuit. 
   
   
       8 . The video processing circuit of  claim 1 , wherein graphical stream comprises an on-screen display (OSD) data. 
   
   
       9 . The video processing circuit of  claim 1 , wherein the video generating unit and the communication interface circuit are disposed in a video processing chip. 
   
   
       10 . The video processing circuit of  claim 9 , wherein the graphic generating unit is an on-screen display (OSD) encoder, disposed in the video processing chip, for generating the graphical stream. 
   
   
       11 . The video processing circuit of  claim 9 , wherein the graphic generating unit is an external storage device of the video processing chip for storing and providing the graphical stream. 
   
   
       12 . The video processing circuit of  claim 1 , further comprising:
 a first signal receiver, coupled to the communication interface circuit, for receiving the first merged signal and extracting the video output stream and the graphical stream from the first merged signal;   a video post-processing unit, coupled to the first signal receiver, for receiving and post-processing the video output stream extracted from the first merged signal to generate a processed video output stream;   a decoding unit, coupled to the first signal receiver, for decoding the graphical stream to generate a decoded graphical stream;   a mixer, coupled to the video post-processing unit and the decoding unit, for mixing the processed video output stream with the decoded graphical stream to generate a second merged signal; and   a second signal transmitter, coupled to the mixer, for outputting the second merged signal.   
   
   
       13 . The video processing circuit of  claim 12 , wherein the video generating unit, the graphic generating unit, and the communication interface circuit are disposed in a video processing chip; and the first signal receiver, the video post-processing unit, the decoding unit mixer, and the second signal transmitter are disposed in a post-processing chip coupled to the video processing chip. 
   
   
       14 . The video processing circuit of  claim 13 , further comprising:
 a video output device, coupled to the second signal transmitter, for receiving the second merged signal and displaying video images according to the second merged signal.   
   
   
       15 . The video processing circuit of  claim 12 , further comprising:
 a storage device, coupled to the decoding unit, for storing the decoded graphical stream.   
   
   
       16 . A method for merging video output streams with a graphical stream for transmission, the method comprising:
 generating a video output stream according to a video input stream;   providing a graphical stream; and   providing a first mode for mixing the video output stream and the graphical stream to transmit a mixed video output stream through a channel and providing a second mode for merging the video output stream and the graphical stream to transmit a first merged signal to a post-processing chip through the channel, wherein the mixed video output stream is generated by combining contents of the video output stream and the graphical stream and the first merged signal is generated by putting the video output stream and the graphical stream in the channel.   
   
   
       17 . The method of  claim 16 , wherein in the second mode, the step of merging the video output stream and the graphical stream comprises:
 increasing a working frequency of the communication interface circuit to increase a bandwidth of the channel.   
   
   
       18 . The method of  claim 16 , wherein in the second mode, the step of merging the video output stream and the graphical stream comprises:
 using positions for transmitting a portion of video control signals in the video output stream to transmit the graphical stream.   
   
   
       19 . The method of  claim 16 , wherein in the second mode, the step of merging the video output stream and the graphical stream comprises:
 compressing the video output stream.   
   
   
       20 . The video processing circuit of  claim 19 , wherein the step of compressing the video output stream comprises:
 transferring the video output stream from a first color depth format to a second color depth format;   replacing actual color values of the video output stream with color indexes of the video output stream; or   transferring the video output stream into a packet format.   
   
   
       21 . The method of  claim 16 , wherein the first merged signal is a low voltage differential signal (LVDS). 
   
   
       22 . The method of  claim 16 , wherein graphical stream comprises an on-screen display (OSD) data. 
   
   
       23 . The method of  claim 16 , further comprising:
 receiving the first merged signal and extracting the video output stream and the graphical stream from the first merged signal;   receiving and post-processing the video output stream extracted from the first merged signal to generate a processed video output stream;   decoding the graphical stream to generate a decoded graphical stream;   mixing the processed video output stream with the decoded graphical stream to generate a second merged signal; and   outputting the second merged signal.