Fabrication Process for Co-Fabricating a Multilayer Probe Array and a Space Transformer

Abstract

Embodiments of the invention provide electrochemical fabrication processes that may be used for the fabrication of space transformers or the co-fabrication of microprobe arrays along with one or more space transformers.

1 . A fabrication process for co-fabricating a multi-layer probe array and a space transformer, comprising:
 (a) forming and adhering a layer of material to a previously formed layer and/or to a substrate, wherein the layer comprises a desired pattern of at least one material; and   (b) repeating the forming and adhering operation of (a) a plurality of times to build up an array of probes and a space transformer from a plurality of adhered layers, and wherein at least a portion of the plurality of layers comprises at least one structural material and at least one sacrificial material; and   (c) after formation of at least a plurality of layers, subjecting the multi-layer structure to a release process that removes at least a portion of at least one sacrificial material from at least some portions of some layers,   wherein the space transformer comprise a plurality of interconnect elements that connect on one side to probes that have a first averaged spacing and connect to pads on another side that have a second averaged spacing that is greater than the first averaged spacing.   
   
   
       2 . The process of  claim 1  wherein the fabrication process comprises an electrochemical fabrication process. 
   
   
       3 . A fabrication process for fabricating a multi-layer space transformer, comprising:
 (a) forming and adhering a layer of material to a previously formed layer and/or to a substrate, wherein the layer comprises a desired pattern of at least one material; and   (b) repeating the forming and adhering operation of (a) a plurality of times to build up configuration of conductive interconnect elements in a configuration of a desired space transformer, wherein the plurality of layers are adhered to one another and comprise at least one of (i) at least one structural material and at least one sacrificial material or (ii) at least two structural materials one of which is a conductor and one of which is a dielectric.   
   
   
       4 . The process of  claim 3  wherein the space transformer is comprises metal electrodeposited or electroless deposited on a layer by layer basis where the height of at least some layers is set by a planarization operation that planarizes an interconnect material and at least one other material. 
   
   
       5 . The process of  claim 3  wherein the space transformer comprises vias and traces that coexist on at least some layers. 
   
   
       6 . The process of  claim 3  wherein the space transformer comprises at least one more coaxial interconnects. 
   
   
       7 . The process of  claim 3  wherein the space transformer comprises interconnects having traces having at least two different widths. 
   
   
       8 . The process of  claim 3  wherein the space transformer comprises interconnects comprising vias that have at least two different widths. 
   
   
       9 . The process of  claim 3  wherein the space transformer comprises interconnects have trace thicknesses that are at least as thick as some planarized thicknesses of a dielectric material. 
   
   
       10 . The process of  claim 3  wherein the space transformer comprises interconnects have trace thicknesses that are at least as thick as the differential height between some interconnect traces. 
   
   
       11 . The process of  claim 3  wherein at least one layer of the space transformer is formed using a process comprising: patterning a first material, applying a non-planar seed layer, electrodepositing a second material, and trimming off at least a portion of the deposited first material. 
   
   
       12 . A space transformer comprising a plurality of interconnect elements that are connectable on one side to probes that have a first averaged spacing and connectable on a different side to pads that have a second averaged spacing that is greater than the first averaged spacing. 
   
   
       13 . The process of  claim 12  wherein the space transformer comprises metal electrodeposited or electroless deposited on a layer by layer basis where the height of at least some layers is set by a planarization operation that planarizes an interconnect material and at least one other material. 
   
   
       14 . The process of  claim 12  wherein the space transformer comprises vias and traces that coexist on at least some layers. 
   
   
       15 . The process of  claim 12  wherein the space transformer comprises at least one more coaxial interconnects. 
   
   
       16 . The process of  claim 12  wherein the space transformer comprises interconnects having traces having at least two different widths. 
   
   
       17 . The process of  claim 12  wherein the space transformer comprises interconnects comprising vias that have at least two different widths. 
   
   
       18 . The process of  claim 12  wherein the space transformer comprises interconnects have trace thicknesses that are at least as thick as some planarized thicknesses of a dielectric material. 
   
   
       19 . The process of  claim 12  wherein the space transformer comprises interconnects have trace thicknesses that are at least as thick as the differential height between some interconnect traces.