Image sensor and method for manufacturing the same

Abstract

An image sensor and a method for manufacturing the same are provided. The image sensor can include a semiconductor substrate, an interlayer dielectric, a second doped layer, a first doped layer, an ohmic contact layer, and metal contacts. The semiconductor substrate can have a pixel region and a peripheral region defined therein. The second doped layer, the first doped layer, and the ohmic contact layer can be stacked on the interlayer dielectric of the semiconductor substrate to form an image sensing device in the pixel region.

1 . An image sensor comprising:
 a semiconductor substrate having a pixel region and a peripheral region defined therein;   a readout interconnection on the semiconductor substrate connected to the pixel region;   a ground interconnection on the semiconductor substrate connected to the peripheral region;   an interlayer dielectric on the semiconductor substrate;   a second doped layer, a first doped layer, and an ohmic contact layer stacked on the interlayer dielectric, wherein the first doped layer is on the second doped layer and the ohmic contact layer is on the first doped layer;   an image sensing device in the pixel region, wherein the image sensing device comprises the ohmic contact layer, the first doped layer, and a portion of the second doped layer corresponding to the pixel region;   a first metal contact extending through the image sensing device and the interlayer dielectric, wherein the first contact is in contact with the readout interconnection;   a barrier pattern on a sidewall of the first metal contact; and   a second metal contact on the first metal contact and a portion of the ohmic contact layer, wherein the second metal contact has a width greater than a width of the first metal contact, wherein the second metal contact is in contact with the first metal contact and the ohmic contact layer.   
   
   
       2 . The image sensor according to  claim 1 , further comprising a pixel isolation layer between the first metal contact and an adjacent first metal contact, the pixel isolation layer separating the image sensing device into pixels. 
   
   
       3 . The image sensor according to  claim 2 , wherein the pixel isolation layer extends through the ohmic contact layer and the first doped layer and is in contact with the second doped layer. 
   
   
       4 . The image sensor according to  claim 2 , further comprising:
 a ground electrode extending through the second doped layer and the interlayer dielectric of the peripheral region, wherein the ground electrode is in contact with the ground interconnection.   
   
   
       5 . The image sensor according to  claim 1 , wherein the barrier pattern comprises an oxide and a nitride. 
   
   
       6 . The image sensor according to  claim 1 , wherein the first doped layer and the ohmic contact layer each comprise N-type impurities, and wherein the second doped layer comprises P-type impurities. 
   
   
       7 . The image sensor according to  claim 1 , wherein the first doped layer is an N− layer, and wherein the ohmic contact layer is an N+ layer, and wherein the second doped layer is a P+ layer. 
   
   
       8 . A method for manufacturing an image sensor, comprising:
 forming a pixel region and a peripheral region in a semiconductor substrate;   forming a readout interconnection on the semiconductor substrate connected to the pixel region;   forming a ground interconnection on the semiconductor substrate connected to the peripheral region;   forming an interlayer dielectric on the semiconductor substrate;   bonding an image sensing device to the interlayer dielectric, the image sensing device comprising a second doped layer, a first doped layer, and an ohmic contact layer stacked therein;   forming a first via hole through the image sensing device and the interlayer dielectric exposing the readout interconnection;   forming a barrier pattern on a sidewall of the first via hole;   forming a metal contact in the first via hole;   forming a trench over the via hole and having a width greater than a width of the first via hole by removing a portion of the metal contact and a portion of the barrier pattern to expose the ohmic contact layer at sides of the first via hole; and   forming a contact plug in the trench.   
   
   
       9 . The method according to  claim 8 , further comprising:
 forming a pixel isolation trench through the ohmic contact layer and the first doped layer between the metal contact and an adjacent metal contact to separate the image sensing device into pixels, wherein the pixel isolation trench exposes the second doped layer; and   forming a pixel isolation layer in the pixel isolation trench.   
   
   
       10 . The method according to  claim 9 , further comprising removing a portion of the ohmic contact layer and a portion of the first doped layer corresponding to the peripheral region to expose the second doped layer in the peripheral region, including a portion of the second doped layer corresponding to the ground interconnection. 
   
   
       11 . The method according to  claim 10 , wherein the exposure of the second doped layer in the peripheral region and the forming of the pixel isolation trench are simultaneously performed. 
   
   
       12 . The method according to  claim 10 , further comprising:
 etching the second doped layer and the interlayer dielectric of the peripheral region to form a second via hole, the second via hole exposing the ground interconnection; and   forming a ground electrode in the second via hole.   
   
   
       13 . The method according to  claim 8 , wherein forming the barrier pattern on the sidewall on the first via hole comprises:
 forming a barrier layer on the image sensing device, including on the sidewall of the first via hole and on the readout interconnection; and   performing a blanket etch process on the barrier layer to remove the barrier layer from an uppermost surface of the image sensing device and from the readout interconnection.   
   
   
       14 . The method according to  claim 8 , wherein forming the trench comprises:
 forming a hard mask on the image sensing device exposing the metal contact; wherein the hard mask has an opening with a width greater than that of the first via hole; and   selectively removing a portion the metal contact, a portion of the barrier pattern, and a portion of the ohmic contact layer using the hard mask as an etch mask.   
   
   
       15 . The method according to  claim 8 , wherein the first doped layer and the ohmic contact layer each comprise N-type impurities, and wherein the second doped layer comprises P-type impurities. 
   
   
       16 . The method according to  claim 8 , wherein the first doped layer is an N- layer, and wherein the ohmic contact layer is an N+ layer, and wherein the second doped layer is a P+ layer. 
   
   
       17 . A method for manufacturing an image sensor, comprising:
 forming a pixel region and a peripheral region in a semiconductor substrate;   forming a readout interconnection on the semiconductor substrate connected to the pixel region;   forming a ground interconnection on the semiconductor substrate connected to the peripheral region;   forming an interlayer dielectric on the semiconductor substrate;   forming an image sensing device comprising a second doped layer, a first doped layer, and an ohmic contact layer on the interlayer dielectric;   forming a first via hole through the image sensing device and the interlayer dielectric exposing the readout interconnection;   forming a barrier pattern on a sidewall of the first via hole;   forming a trench over the via hole and having a width greater than a width of the first via hole to expose the ohmic contact layer; and   gap-filling a metal layer in the first via hole and the trench to form metal contacts.   
   
   
       18 . The method according to  claim 17 , further comprising:
 forming a pixel isolation trench through the ohmic contact layer and the first doped layer between the metal contacts and an adjacent set of metal contacts to separate the image sensing device into pixels, wherein the pixel isolation trench exposes the second doped layer; and   forming a pixel isolation layer in the pixel isolation trench.   
   
   
       19 . The method according to  claim 18 , further comprising removing a portion of the ohmic contact layer and a portion of the first doped layer corresponding to the peripheral region to expose the second doped layer in the peripheral region, including a portion of the second doped layer corresponding to the ground interconnection. 
   
   
       20 . The method according to  claim 17 , wherein the first doped layer is an N− layer, and wherein the ohmic contact layer is an N+ layer, and wherein the second doped layer is a P+ layer.