Voltage feedback circuit for active matrix reflective display devices

Abstract

The present invention is a driving circuit for use with reflective display devices. In a preferred embodiment, the display device is a pixilated, active matrix electrochromic device. The inventive circuit includes a sampling capacitor and a plurality of inverters. The sampling circuit quickly stores a data voltage. Addressing of a plurality of electrochromic pixels in an active matrix is thereby accelerated. The inverters are coupled to a relatively high and low power source for quickly driving the electrochromic pixel to the stored data voltage. The circuit of the present invention permits rapid refreshing of electrochromic pixels in an active matrix and achieves color gradients without bleaching and recharging the electrochromic pixel.

1 - 22 . (canceled) 
   
   
       23 . A method of charging a reflective display pixel, the method comprising:
 electrically isolating the reflective display pixel from a data line in response to commencement of an addressing phase;   storing a data signal received from the data line;   coupling the reflective display pixel to the stored data signal in response to completion of the addressing phase;   amplifying the data signal to produce a driving signal; and   applying the driving signal to the reflective display pixel;   feeding back an electrical potential of the reflective display pixel such that the electrical potential of the reflective display pixel becomes equal to the stored data signal.   
   
   
       24 . The method of claim  1 , wherein the reflective display pixel is an electrochromic pixel. 
   
   
       25 . The method of claim  2 , wherein the electrochromic pixel is included in an active matrix electrochromic device. 
   
   
       26 . The method of claim  3 , wherein the electrochromic pixel is electrically isolated from the active matrix by way of a transistor. 
   
   
       27 . The method of claim  1 , wherein the data signal is stored on a capacitor. 
   
   
       28 . The method of claim  1 , wherein the data signal is amplified by a plurality of inverters to produce the driving signal. 
   
   
       29 . A circuit for charging a reflective display pixel, the circuit comprising:
 means for selectively isolating the reflective display pixel from a data signal in response to commencement of an addressing phase;   means for sampling the data signal;   means for coupling the reflective display pixel to the means for sampling the data signal in response to completion of the addressing phase;   means for amplifying the data signal to produce a driving potential;   means for applying the driving potential to the reflective display pixel; and   means for feedback of an electrical potential of the reflective display pixel such that the electrical potential of the reflective display becomes equal to the sampled data signal.   
   
   
       30 . The circuit of claim  7 , wherein the reflective display pixel is an electrochromic pixel. 
   
   
       31 . The circuit of claim  7 , wherein the means for selecticely isolating the reflective display pixel from a data signal comprises:
 a first transistor, wherein a source of the first transistor is coupled to the data line, a gate of the first transistor is coupled to a selection line, and a drain of the first transistor is coupled to a capacitor.   
   
   
       32 . The circuit of claim  9 , wherein the means for selecticely isolating the reflective display pixel from a data signal further comprises:
 a second transistor, wherein a source of the second transistor is coupled to an electrode of the reflective display pixel, a drain of the second transistor is coupled to the capacitor, and a gate of the second transistor is coupled to the selection line.   
   
   
       33 . The circuit of claim  10 , wherein the means for selecticely isolating the reflective display pixel from a data signal further comprises:
 a third transistor, wherein a source of the third transistor is coupled to the capacitor, a drain of the second transistor is coupled to an output of means for amplifying the data signal to produce a driving potential, and a gate of the third transistor is coupled to the selection line.   
   
   
       34 . The circuit of claim  7 , wherein the means for amplifying the data signal to produce a driving potential comprises:
 a pull-up device having a source coupled to a relatively high voltage source; and   a pull-down device having a source coupled to a relatively low voltage source.   
   
   
       35 . The circuit of claim  7 , wherein the means for amplifying the data signal to produce a driving potential comprises:
 a p-type transistor having a source coupled to a relatively high voltage source; and   an n-type transistor having a source coupled to a relatively low voltage source.