Structure and method of forming metal interconnect structures in ultra low-k dielectrics
Abstract
A metal interconnect structure in ultra low-k dielectrics is described having a capped interconnect layer; an interconnect feature with a contact via and a contact line formed in a dielectric layer, where the via is partially embedded into the interconnect layer; and a thin film formed on the dielectric layer and separating the dielectric layer from the contact line. A method of fabricating the interconnect structure is also described and includes forming a first dielectric on a capped interconnect element; forming a thin film over the first dielectric; forming a second dielectric on the thin film; forming a via opening on the second dielectric, the thin film and extending into the first dielectric; forming a line trench on a portion of the second dielectric; and filling the via opening and the line trench with a conductive material for forming a contact via and a contact line, where the contact via is partially embedded in the interconnect element.
Claims
exact text as granted — not AI-modified1 . An interconnect structure comprising:
a capped interconnect layer; a dielectric layer having at least one interconnect feature, said interconnect feature having a contact via and a contact line, wherein said contact via is partially embedded into a portion of said interconnect layer; and a thin layer formed on said dielectric layer, said thin layer separating said dielectric layer from said contact line.
2 . The interconnect structure of claim 1 , wherein said interconnect layer includes a metal selected from a group consisting of Cu, Al, W and alloys thereof.
3 . The interconnect structure of claim 1 , wherein said dielectric layer is an ultra low-k dielectric layer.
4 . The interconnect structure of claim 1 , wherein said at least one interconnect feature includes a metal selected from a group consisting of Cu, Al, W and alloys thereof.
5 . The interconnect structure of claim 1 , wherein said at least one interconnect feature includes a Cu-containing conductive material.
6 . The interconnect structure of claim 1 , wherein the thin layer is a metallic layer used as etch stopper to prevent a localized deep trench defect formation in said contact line.
7 . The interconnect structure of claim 6 , wherein said metallic layer is selected from the group consisting of TaN, Ta, Co and W, Ti and TiN.
8 . The interconnect structure of claim 1 , wherein said thin layer is a low-k dielectric material adapted as an etch stopper to prevent a localized deep trench formation in said contact line.
9 . The interconnect structure of claim 1 , wherein said thin layer is selected from a group consisting of SixNy, SiCx, SiCxNyHz, NbloK, PECVD, Al2O3, Flowable Oxide, TEOS, and Polyimide.
10 . An interconnect structure comprising:
an interconnect element formed on a first insulating layer and having a capping layer; a second insulating layer formed on said capping layer, wherein said second insulating layer includes at least one interconnect feature having a metal via and a metal line,
wherein a said metal via is perpendicular to said interconnect element and is partially embedded into a portion of said interconnect element, and
wherein said metal line is parallel to said interconnect element; and
a thin layer formed over said second insulating layer, said thin layer separating said second insulating layer from said metal line.
11 . The interconnect structure of claim 10 , wherein said second insulating layer contains a dielectric material.
12 . The interconnect structure of claim 11 , wherein said dielectric material is an ultra low-k dielectric.
13 . The interconnect structure of claim 10 , wherein said interconnect element includes a conductive material.
14 . The interconnect structure of claim 13 , wherein said conductive material is selected from a group consisting of Cu, Al, W and alloys thereof.
15 . The interconnect structure of claim 13 , wherein said conductive material is Cu.
16 . The interconnect structure of claim 10 , wherein an upper surface of said interconnect element is substantially coplanar with a surface of said first insulating layer.
17 . The interconnect structure of claim 10 , wherein the thin layer is a metallic layer.
18 . The interconnect structure of claim 17 , wherein said metallic layer is selected from the group consisting of TaN, Ta, Co and W, Ti and TiN.
19 . The interconnect structure of claim 10 , wherein said thin layer is a low-k dielectric material.
20 . The interconnect structure of claim 10 , wherein said thin layer is selected from a group consisting of SixNy, SiCx, SiCxNyHz, NbloK, PECVD, Al2O3, Flowable Oxide, TEOS, and Polyimide.
21 . An interconnect structure comprising:
an interconnect element having a metal and formed on a first dielectric layer; a capping layer formed on said interconnect element; an ultra low-k dielectric layer formed on said capping layer, said ultra low-k dielectric layer having at least one interconnect feature, wherein said interconnect feature includes a first portion parallel to said dielectric layer and a second portion perpendicular to said dielectric layer, wherein said second portion is substantially embedded in a portion of said interconnect element; and a thin layer formed on a surface of said first portion of said interconnect feature.
22 . The interconnect structure of claim 21 , wherein said second portion is a conductive via line.
23 . The interconnect structure of claim 21 , wherein said first portion is a conductive line.
24 . The interconnect structure of claim 21 , wherein the thin layer is a metallic layer.
25 . The interconnect structure of claim 24 , wherein said metallic layer is selected from the group consisting of TaN, Ta, Co and W, Ti and TiN.
26 . The interconnect structure of claim 21 , wherein said thin layer is a low-k dielectric material.
27 . The interconnect structure of claim 22 , wherein said thin layer is selected from a group consisting of SixNy, SiCx, SiCxNyHz, NbloK, PECVD, Al2O3, Flowable Oxide, TEOS, and Polyimide.
28 . A method of fabricating an interconnect structure, comprising:
forming a capped interconnect element on an insulating layer; forming a first dielectric layer on said capped interconnect element; forming a thin barrier layer over said first dielectric layer; forming a second dielectric layer on said thin barrier layer; forming a via opening on said second dielectric layer and said thin barrier layer; forming a line trench on a portion of said second dielectric layer, wherein said via opening extends into a portion of said first dielectric layer; and filling said via opening and said line trench with a conductive material for forming a contact via and a contact line.
wherein a portion of said contact via is partially embedded in a portion of said interconnect element and further wherein said thin barrier layer separates said first dielectric from said contact line.
29 . The method of fabricating the interconnect structure of claim 28 , wherein said interconnect element includes a material selected from a group consisting of Cu, Al, W and alloys thereof.
30 . The method of fabricating the interconnect structure of claim 28 , wherein said conductive material is Cu.
31 . The method of fabricating the interconnect structure of claim 28 , wherein the thin barrier layer is a metallic layer.
32 . The method of fabricating the interconnect structure of claim 31 , wherein said metallic layer is selected from the group consisting of TaN, Ta, Co and W, Ti and TiN.
33 . The method of fabricating the interconnect structure of claim 28 , wherein said thin barrier layer is a low-k dielectric material.
34 . The method of fabricating the interconnect structure of claim 28 , wherein said thin barrier layer is selected from a group consisting of SixNy, SiCx, SiCxNyHz, NbloK, PECVD, Al2O3, Flowable Oxide, TEOS, and Polyimide.
35 . The method of fabricating the interconnect structure of claim 28 , wherein said first dielectric layer and said second dielectric layer are ultra low-k dielectrics.
36 . A method of forming an interconnect structure, the method comprising:
forming a first ultra low-k dielectric of via height thickness on top of an underlying interconnect layer; forming an ultra thin film on said first ultra low-k dielectric layer; forming a second ultra low-k dielectric of line level thickness on said ultra thin film; etching a via through said second ultra low-k dielectric, said ultra thin film and substantially through said first ultra low-k dielectric; etching a line trench in a portion of said second ultra low-k dielectric, wherein said via is etched through said interconnect layer; and depositing a metal for defining an interconnect level.
37 . The method of forming the interconnect structure of claim 36 , wherein said interconnect layer includes a Cu containing material.
38 . The method of forming the interconnect structure of claim 36 , wherein the ultra thin film is a metallic layer.
39 . The method of forming the interconnect structure of claim 38 , wherein said metallic layer is selected from the group consisting of TaN, Ta, Co and W, Ti and TiN.
40 . The method of forming the interconnect structure of claim 36 , wherein said ultra thin film is a low-k dielectric material.
41 . The method of forming the interconnect structure of claim 36 , wherein said ultra thin film is selected from a group consisting of SixNy, SiCx, SiCxNyHz, NbloK, PECVD, Al2O3, Flowable Oxide, TEOS, and Polyimide.
42 . The method of forming the interconnect structure of claim 36 , wherein said interconnect level includes a contact via and a contact line.
43 . The method of forming the interconnect structure of claim 42 , wherein said contact via is partially embedded in a portion of said interconnect layer and wherein said ultra thin firm is formed between a surface of said contact line and said first ultra low-k dielectric.Cited by (0)
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