Methods of Forming Semiconductor Devices Using Plasma Dehydrogenation and Devices Formed Thereby

Abstract

A semiconductor integrated circuit device with enhanced reliability is provided. The semiconductor integrated circuit device includes a semiconductor substrate; a gate insulation film that is provided on the semiconductor substrate; a gate electrode that is provided on the gate insulation film; and a sidewall spacer that is provided on side walls of the gate insulation film and the gate electrode and includes, wherein the sidewall spacer has a first sidewall spacer in contact with the gate electrode and a second sidewall spacer formed on the side walls of the first sidewall spacer, and a ratio of an Si—OH area to an Si—O area in at least one of the first and second sidewall spacers is 0.05 or less, as measured by Fourier Transform InfraRed (FTIR).

1 . A method of fabricating a field effect transistor, comprising:
 forming a gate electrode on a semiconductor substrate;   forming an oxide spacer having hydrogen therein, on a sidewall of the gate electrode; and   removing hydrogen from the oxide spacer by exposing the oxide spacer to a plasma that converts the oxide spacer into a dehydrogenized oxide spacer having an electrically insulating region therein with a Si—OH/Si—O ratio of less than about 0.05 in the electrically insulating region.   
     
     
         2 . The method of  claim 1 , wherein the plasma is generated from a reactant gas comprising nitrogen and/or oxygen. 
     
     
         3 . The method of  claim 2 , wherein the reactant gas comprises at least one gas selected from a group consisting of N 2 , O 2 , O 3  and N 2 O. 
     
     
         4 . The method of  claim 1 , wherein said removing is followed by forming an electrically insulating spacer on a sidewall of the oxide spacer. 
     
     
         5 . The method of  claim 1 , wherein the oxide spacer comprises a first oxide spacer and a second oxide spacer, and forming an oxide spacer further comprising:
 conformally forming the first oxide spacer layer on the semiconductor substrate;   performing a first ion implantation process using as ion implantation masks the gate insulation film, the gate electrode and the first oxide spacer layer formed on the gate insulation film and sidewalls of the gate electrode;   conformally forming a second oxide spacer layer on the semiconductor substrate.   
     
     
         6 . The method of  claim 5 , wherein the plasma treatment process is performed using a gas containing nitrogen (N) or oxygen (O) as a reactant gas. 
     
     
         7 . The method of  claim 6 , wherein the reactant gas is selected from N 2 , O 2 , O 3 , N 2 O, and combinations thereof. 
     
     
         8 . The method of  claim 5 , before performing the first ion implantation process, further comprising forming a first oxide spacer on both sidewalls of the gate insulation film and the gate electrode by etching the first oxide spacer layer, wherein the dehydrogenizing of the first and second oxide spacer layers comprises dehydrogenizing the first oxide spacer and the second oxide spacer layer. 
     
     
         9 . The method of  claim 5 , after the dehydrogenizing of the first and second oxide spacer layers, further comprising:
 conformally forming a third nitride spacer layer on the second oxide spacer layer;   forming first, second and third nitride spacers on sidewalls of the gate insulation film and the gate electrode by etching the first, second and third nitride spacer layers; and   performing a second ion implantation process using the first and second oxide spacers as ion implantation masks.   
     
     
         10 . The method of  claim 1 , wherein the oxide spacer comprises a first oxide spacer and a second oxide spacer, and forming an oxide spacer further comprises:
 conformally forming the first oxide spacer layer on the semiconductor substrate;   dehydrogenizing the first oxide spacer layer by performing a first plasma treatment process on the semiconductor substrate;   performing a first ion implantation process using as ion implantation masks the gate insulation film, the gate electrode and the first oxide spacer layer formed on the gate insulation film and sidewalls of the gate electrode; and   conformally forming the second oxide spacer layer on the semiconductor substrate.   
     
     
         11 . The method of  claim 10 , wherein the first plasma treatment process is performed using a gas containing nitrogen (N) or oxygen (O) as a reactant gas. 
     
     
         12 . The method of  claim 11 , wherein the reactant gas is selected from N 2 , O 2 , O 3 , N 2 O, and combinations thereof. 
     
     
         13 . The method of  claim 10 , before performing the first ion implantation process, further comprising forming a first oxide spacer on both sidewalls of the gate insulation film and the gate electrode by etching the first oxide spacer layer. 
     
     
         14 . The method of  claim 13 , after the forming of the second oxide spacer layer, further comprising:
 dehydrogenizing the second oxide spacer layer by performing a second plasma treatment process on the semiconductor substrate;   conformally forming a third nitride spacer layer on the second oxide spacer layer;   forming second and third nitride spacers on both sidewalls of the first oxide spacer by etching the second and third nitride spacer layers; and   performing a second ion implantation process using the second and third nitride spacers as ion implantation masks.   
     
     
         15 . The method of  claim 14 , wherein the first and second oxide spacer layers are low temperature oxide (LTO) layers. 
     
     
         16 - 20 . (canceled)