US2010201697A1PendingUtilityA1
Die Customization using Programmable Resistance Memory Elements
Est. expiryJun 11, 2023(expired)· nominal 20-yr term from priority
G11C 2029/4402G11C 2013/0083G11C 13/0004
40
PatentIndex Score
0
Cited by
0
References
0
Claims
Abstract
A method of customizing an integrated circuit chip, comprising the steps of: providing an electronic circuit on said chip; providing a phase-change memory on the chip; storing information about said electronic circuit in the phase-change memory. A method of operating an optical display.
Claims
exact text as granted — not AI-modified1 . A method of operating an optical display, comprising:
providing said optical display, said optical display including a plurality of pixel elements, at least one of said pixel elements being defective; providing an electrically programmable phase-change memory; and storing the address of said defective pixel element in said phase-change memory.
2 . The method of claim 1 , further comprising:
storing the address of a corresponding redundant functional pixel element in said phase-change memory.
3 . The method of claim 2 , further comprising:
routing a signal from said defective pixel element to said redundant functional pixel element.
4 . The method of claim 1 , wherein said phase-change memory comprises a chalcogenide material.
5 . The method of claim 1 , wherein said phase-change memory comprises an array of phase-change memory elements.
6 . A method of operating an optical display, comprising:
providing said optical display, said optical display including a plurality of defective pixel elements; providing an electrically programmable phase-change memory; and storing the addresses of said defective pixel elements in said phase-change memory.
7 . The method of claim 6 , further comprising:
storing the addresses of redundant functional pixel elements in said phase-change memory.
8 . The method of claim 7 , further comprising:
routing signals from said defective pixels elements to said redundant functional pixel elements.
9 . The method of claim 6 , wherein said phase-change memory comprises a chalcogenide material.
10 . The method of claim 6 , wherein said phase-change memory comprises an array of phase-change memory elements.Cited by (0)
No later patents cite this yet.
References (0)
No backward citations on record.