Method and apparatus for on-die temperature sensing and control

Abstract

For one disclosed embodiment, a plurality of processor cores may be on a semiconductor die. The processor cores may have at least one corresponding temperature sensor. Circuitry on the semiconductor die may generate thermal event indications based on sensed temperatures from multiple temperature sensors of multiple processor cores. A thermal event indication may indicate that a sensed temperature exceeds a temperature point. Central management logic on the semiconductor die may receive thermal event indications based on sensed temperatures from multiple temperature sensors of multiple processor cores. The central management logic may modify operation of one or more of the processor cores in response to a thermal event indication. Other embodiments are also disclosed.

1 . An apparatus comprising:
 a plurality of processor cores on a semiconductor die, the processor cores having at least one corresponding temperature sensor;   circuitry on the semiconductor die to generate thermal event indications based on sensed temperatures from multiple temperature sensors of multiple processor cores, a thermal event indication to indicate that a sensed temperature exceeds a temperature point; and   central management logic on the semiconductor die to receive thermal event indications based on sensed temperatures from multiple temperature sensors of multiple processor cores,   the central management logic to modify operation of one or more of the processor cores in response to a thermal event indication.   
   
   
       2 . The apparatus of  claim 1 , wherein a processor core has a temperature sensor to sense temperature at a hotspot. 
   
   
       3 . The apparatus of  claim 1 , wherein temperature sensors have one or more corresponding temperature points, and
 wherein the circuitry to generate thermal event indications is to compare sensed temperatures from multiple temperature sensors to corresponding temperature points.   
   
   
       4 . The apparatus of  claim 1 , wherein the circuitry to generate thermal event indications is to compare sensed temperatures from multiple temperature sensors of multiple processor cores to the same temperature point. 
   
   
       5 . The apparatus of  claim 1 , comprising a register on the semiconductor die to store a digital value corresponding to a sensed temperature. 
   
   
       6 . The apparatus of  claim 1 , wherein the circuitry to generate thermal event indications is to compare a digital value corresponding to a sensed temperature to a digital value corresponding to a temperature point. 
   
   
       7 . The apparatus of  claim 1 , wherein the circuitry to generate thermal event indications is to compare sensed temperatures from multiple temperature sensors of multiple processor cores to programmable temperature points. 
   
   
       8 . The apparatus of  claim 1 , the central management logic to modify operation of a processor core from which a sensed temperature generates a thermal event indication. 
   
   
       9 . The apparatus of  claim 1 , the central management logic to generate an interrupt to one or more of the processor cores in response to a thermal event indication. 
   
   
       10 . The apparatus of  claim 1 , the central management logic to modify a clock for one or more of the processor cores in response to a thermal event indication. 
   
   
       11 . A method comprising:
 sensing temperatures with multiple temperature sensors of multiple processor cores on a semiconductor die, wherein the processor cores have at least one corresponding temperature sensor;   generating by circuitry on the semiconductor die thermal event indications based on sensed temperatures from multiple temperature sensors of multiple processor cores, wherein a thermal event indication is to indicate that a sensed temperature exceeds a temperature point;   receiving by central management logic on the semiconductor die thermal event indications based on sensed temperatures from multiple temperature sensors of multiple processor cores; and   modifying by the central management logic operation of one or more of the processor cores in response to a thermal event indication.   
   
   
       12 . The method of  claim 11 , wherein sensing temperatures includes sensing a temperature at a hotspot. 
   
   
       13 . The method of  claim 11 , wherein temperature sensors have one or more corresponding temperature points, and
 wherein generating thermal event indications includes comparing sensed temperatures from multiple temperature sensors to corresponding temperature points.   
   
   
       14 . The method of  claim 11 , wherein generating thermal event indications includes comparing sensed temperatures from multiple temperature sensors of multiple processor cores to the same temperature point. 
   
   
       15 . The method of  claim 11 , comprising storing in a register on the semiconductor die a digital value corresponding to a sensed temperature. 
   
   
       16 . The method of  claim 11 , wherein generating thermal event indications includes comparing a digital value corresponding to a sensed temperature to a digital value corresponding to a temperature point. 
   
   
       17 . The method of  claim 11 , wherein generating thermal event indications includes comparing sensed temperatures from multiple temperature sensors of multiple processor cores to programmable temperature points. 
   
   
       18 . The method of  claim 11 , wherein modifying operation includes modifying operation of a processor core from which a sensed temperature generates a thermal event indication. 
   
   
       19 . The method of  claim 11 , wherein modifying operation includes generating an interrupt to one or more of the processor cores in response to a thermal event indication. 
   
   
       20 . The method of  claim 11 , wherein modifying operation includes modifying a clock for one or more of the processor cores in response to a thermal event indication.