US2010267206A1PendingUtilityA1

Semiconductor die package including heat sinks

37
Assignee: GOMEZ JOCEL PPriority: Aug 29, 2007Filed: May 3, 2010Published: Oct 21, 2010
Est. expiryAug 29, 2027(~1.1 yrs left)· nominal 20-yr term from priority
Inventors:Jocel P. Gomez
H10W 90/736H10W 90/726H10W 72/07251H10W 72/877H10W 72/20H10W 70/466H10W 40/778H10W 70/481
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Claims

Abstract

A semiconductor die package including at least two heat sinks. The semiconductor die package includes a first heat sink, a second heat sink coupled to the first heat sink, and a semiconductor die between the first heat sink and the second heat sink. The semiconductor die is electrically coupled to the first heat sink and the second heat sink. The semiconductor die may also be attached to a lead.

Claims

exact text as granted — not AI-modified
1 - 12 . (canceled) 
     
     
         13 . A method comprising:
 attaching a semiconductor die to a first heat sink;   attaching the semiconductor die to the second heat sink; and   attaching a lead to the semiconductor die,   wherein the semiconductor die is disposed between the first heat sink and the second heat sink.   
     
     
         14 . The method of  claim 13  wherein the lead is part of a leadframe, and wherein the method comprises attaching the semiconductor die to the leadframe, and molding a molding material around at least a portion of the semiconductor die and the leadframe. 
     
     
         15 . The method of  claim 13  wherein the semiconductor die comprises a power MOSFET. 
     
     
         16 . The method of  claim 13  wherein the second heat sink comprises at least a first side portion and a second side portion and a planar portion substantially perpendicular to the first side portion and the second side portion. 
     
     
         17 . The method of  claim 13  further comprising attaching the lead to the first heat sink, and then attaching the first heat sink and the lead to the semiconductor die. 
     
     
         18 . The method of  claim 17  further comprising:
 molding a molding material around at least a portion of the semiconductor die and the leadframe, thereafter forming a semiconductor die package; and   attaching first and second heat dissipation structures on opposite surfaces of the semiconductor die package.   
     
     
         19 . The method of  claim 17  further comprising:
 molding a molding material around at least a portion of the semiconductor die and the leadframe, thereafter forming a semiconductor die package; and   attaching first and second circuit boards on opposite surfaces of the semiconductor die package.   
     
     
         20 . The method of  claim 19  wherein the circuit boards are mechanically and electrically coupled to the first and second heat sinks in the semiconductor die package.

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