Semiconductor device including an improved capacitor and method for manufacturing the same
Abstract
In a semiconductor device according to embodiments of the invention, a capacitor includes a storage electrode having a cylindrical storage conductive layer pattern and connecting members formed on the upper portion of the cylindrical storage conductive layer pattern. The connecting member connects to an adjacent connecting member of another storage electrode. A dielectric layer and a plate electrode are successively formed on the storage electrode. All of the capacitors are connected by one another by forming cylindrical storage electrodes so that the storage electrode does not fall down when the capacitors have an extremely large aspect ratio. Thus, the capacitance of the capacitors may be improved to the desired level. A semiconductor device that includes these capacitors may have improved reliability and the throughput of a semiconductor manufacturing process may be increased.
Claims
exact text as granted — not AI-modified1 - 13 . (canceled)
14 . A method of manufacturing a capacitor comprising:
forming a contact region on a surface portion of a semiconductor substrate; forming a mold layer on the substrate; forming a stabilizing member at a portion of the mold layer to structurally stabilize a storage electrode; forming a contact hole through the mold layer to expose a sidewall of the stabilizing member and the contact region; forming the storage electrode on the contact region and on the sidewall of the stabilizing member; forming a dielectric layer on the storage electrode; and forming a plate electrode on the dielectric layer.
15 . The method of claim 14 , prior to forming the contact hole, further comprising:
forming a mask layer on the mold layer; forming a mask pattern on the mold layer by etching the mask layer; and forming a first opening at an upper portion of the mold layer by partially etching the mold layer using the mask pattern, wherein the first opening has a first width and a first depth.
16 . The method of claim 14 , wherein the stabilizing member includes any one selected from the group consisting of nitride, oxynitride and polysilicon doped with first impurities.
17 . The method of claim 16 , wherein the mold layer comprises oxide.
18 . The method of claim 17 , wherein the mold layer comprises any one selected from the group consisting of boro-phosphor silicate glass (BPSG), phosphor silicate glass (PSP), spin on glass (SOG), undoped silicate glass (USG), plasma enhanced tetraethylorthosilicate (PE-TEOS) and high density plasma-chemical vapor deposition (HDP-CVD) oxide.
19 . The method of claim 15 , wherein the mask layer comprises polysilicon or nitride.
20 . The method of claim 15 , wherein a ratio between a thickness of the mold layer and a thickness of the mask layer is about 8:1 to about 50:1.
21 . The method of claim 15 , wherein the first opening is formed by an anisotropic etching process.
22 . The method of claim 15 , further comprising forming a second opening at the upper portion of the mold layer by partially etching the mold layer, wherein the second opening has a second width wider than the first width, and a second depth deeper than the first depth.
23 . The method of claim 22 , wherein the second opening is formed by an isotropic etching process.
24 . The method of claim 22 , wherein the second opening is formed by a wet etching process, a dry etching process or a plasma etching process.
25 . The method of claim 22 , wherein forming the stabilizing member further comprises:
forming an insulation layer on a sidewall and a bottom of the second opening and on the mask pattern; forming an insulation layer pattern on the sidewall and the bottom of the second opening by partially etching the insulation layer; and forming the stabilizing member by removing a portion of the insulation layer pattern on the bottom of the second opening.
26 . The method of claim 25 , wherein the insulation layer pattern is formed by a chemical mechanical polishing (CMP) process, an etch back process, or a combination process of CMP and etch back.
27 . The method of claim 25 , wherein forming the contact hole is simultaneously performed with removing the portion of the insulation layer pattern.
28 . The method of claim 15 , further comprising extending the contact hole.
29 . The method of claim 28 , wherein extending the contact hole is performed by a cleaning process.
30 . The method of claim 29 , wherein the cleaning process is carried out using a cleaning solution comprising at least two of deionized water, ammonia solution and sulfuric acid.
31 . The method of claim 28 , wherein forming the storage electrode comprises:
forming a conductive layer on the sidewall of the stabilizing member, on a sidewall of the extended contact hole and on the mask pattern; and removing a portion of the conductive layer and the mask pattern until the stabilizing member is exposed.
32 . The method of claim 31 , wherein removing the portion of the conductive layer and the mask pattern is formed by a CMP process, an etch back process, or a combination process of CMP and etch back.
33 . The method of claim 28 , wherein forming the stabilizing member further comprises:
forming a polysilicon layer doped with first impurities on a sidewall, a bottom of the second opening, and on the mask pattern; forming a polysilicon layer pattern on the sidewall and the bottom of the second opening by partially etching the polysilicon layer doped with the first impurities; and forming the stabilizing member by removing a portion of the polysilicon layer pattern on the bottom of the second opening.
34 . The method of claim 33 , wherein forming the storage electrode comprises:
forming a polysilicon layer doped with second impurities on the sidewall of the stabilizing member, on a sidewall of the extended contact hole, and on the mask pattern; and removing a portion of the polysilicon layer doped with second impurities and the mask pattern until the stabilizing member is exposed.
35 . The method of claim 28 , wherein forming the stabilizing member further comprises:
successively forming a metal oxide layer and an insulation layer on a sidewall and a bottom of the second opening, and on the mask pattern; forming a metal oxide layer pattern and an insulation layer pattern on the sidewall and the bottom of the second opening by partially etching the metal oxide layer and the insulation layer; and simultaneously forming a protecting member and the stabilizing member by removing portions of the metal oxide layer pattern and the insulation layer pattern on the bottom of the second opening.
36 . The method of claim 14 , further comprising removing the mold layer before forming the dielectric layer.
37 . The method of claim 36 , wherein the mold layer is removed using an LAL solution.
38 . A method of forming a semiconductor device comprising:
forming gate structures on a semiconductor substrate; forming first contact regions and second contact regions at portions of the substrate between the gate structures, respectively; forming first pads making contact with the first contact regions; forming second pads making contact with the second contact regions; forming bit lines making contact with the second pads; forming a mold layer on the substrate to cover the bit lines; forming stabilizing members at portions of the mold layer where the first pads are positioned; forming contact holes through the mold layer to expose sidewalls of the stabilizing members and the first pads; forming storage electrodes on the sidewalls of the stabilizing members, on the first pads, and on sidewalls of the contact holes; forming dielectric layers on the storage electrodes and on the stabilizing members; and forming plate electrodes on the dielectric layers.
39 . The method of claim 38 , prior to forming the contact holes, further comprising:
forming a mask layer on the mold layer; forming a mask pattern on the mold layer by etching the mask layer; forming first openings at upper portions of the mold layer by partially etching the mold layer using the mask pattern, wherein each of the first openings has a first width and a first depth; and forming second openings at the upper portions of the mold layer by partially etching the mold layer, wherein each of the second openings has a second width wider than the first width, and a second depth deeper than the first depth.
40 . The method of claim 39 , wherein the first openings are formed by an anisotropic etching process, and the second openings are formed by an isotropic etching process.
41 . The method of claim 39 , wherein forming the stabilizing members comprises: forming an insulation layer on sidewalls and bottoms of the second openings and on the mask pattern; forming insulation layer patterns on the sidewalls and the bottoms of the second openings by partially etching the insulation layer; and forming the stabilizing members by removing portions of the insulation layer patterns on the bottoms of the second openings.
42 . The method of claim 41 , wherein forming the contact holes is simultaneously performed with removing the portions of the insulation layer patterns.
43 . The method of claim 39 , further comprising extending the contact holes by a cleaning process.
44 . The method of claim 43 , wherein forming the storage electrodes comprises:
forming a conductive layer on the sidewalls of the stabilizing members, on sidewalls of the extended contact holes, and on the mask pattern; and removing portions of the conductive layer and the mask pattern until the stabilizing members are exposed.
45 . The method of claim 43 , wherein forming the stabilizing members comprises:
forming a polysilicon layer doped with first impurities on sidewalls and bottoms of the second openings and on the mask pattern; forming polysilicon layer patterns on the sidewalls and the bottoms of the second openings by partially etching the polysilicon layer doped with the first impurities; and forming the stabilizing members by removing portions of the polysilicon layer patterns on the bottoms of the second openings.
46 . The method of claim 45 , wherein forming the storage electrodes comprises:
forming a polysilicon layer doped with second impurities on the sidewalls of the stabilizing members, on sidewalls of the extended contact holes, and on the mask pattern; and removing portions of the polysilicon layer doped with second impurities and the mask pattern until the stabilizing members are exposed.
47 . The method of claim 39 , wherein forming the stabilizing members comprises:
successively forming a metal oxide layer and an insulation layer on sidewalls and bottoms of the second openings and on the mask pattern; forming metal oxide layer patterns and insulation layer patterns on the sidewalls and the bottoms of the second openings by partially etching the metal oxide layer and the insulation layer; and simultaneously forming protecting members and the stabilizing members by removing portions of the metal oxide layer patterns and the insulation layer patterns on the bottoms of the second openings.Join the waitlist — get patent alerts
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