Cmos image sensor and method of operating the same

Abstract

A CMOS image sensor includes a pixel array unit, a row selection unit, and a logic circuit. The pixel array unit is used for sensing an object. The pixel array unit includes M pixels and P multiplexers wherein each of the M pixels is electrically connected to one of the P multiplexers. The row selection unit and the logic circuit are electrically connected to the P multiplexers. The row selection unit is used for generating a row selection signal. The logic circuit is used for determining a sensing region corresponding to the object wherein the sensing region includes N of the M pixels. Furthermore, the logic circuit controls Q multiplexers, which are electrically connected to the N pixels, to transmit the row selection signal to the N pixels.

1 . A CMOS image sensor comprising:
 a pixel array unit for sensing an object, the pixel array unit comprising M pixels and P multiplexers, each of the M pixels being electrically connected to one of the P multiplexers wherein M is a positive integer and P is a positive integer smaller than or equal to M;   a row selection unit, electrically connected to the P multiplexers, for generating a row selection signal; and   a logic circuit, electrically connected to the P multiplexers, for determining a sensing region corresponding to the object wherein the sensing region comprises N of the M pixels and N is a positive integer smaller than or equal to M, the logic circuit controlling Q multiplexers, which are electrically connected to the N pixels, to transmit the row selection signal to the N pixels wherein Q is a positive integer smaller than or equal to N and smaller than or equal to P.   
     
     
         2 . The CMOS image sensor of  claim 1 , further comprising a read-out circuit, electrically connected to the pixel array unit, for reading signals generated by the N pixels of the sensing region. 
     
     
         3 . The CMOS image sensor of  claim 2 , wherein the read-out circuit reads the signals generated by the N pixels of the sensing region in row-major order. 
     
     
         4 . The CMOS image sensor of  claim 2 , wherein when the sensing region exceeds a real region of the pixel array unit, the read-out circuit adds at least one dummy pixel to the sensing region. 
     
     
         5 . The CMOS image sensor of  claim 1 , wherein the sensing region is a parallelogram. 
     
     
         6 . The CMOS image sensor of  claim 1 , wherein when P is smaller than M, at least two of the M pixels are electrically connected to one of the P multiplexers simultaneously and the at least two pixels are located at different columns of the pixel array unit. 
     
     
         7 . The CMOS image sensor of  claim 6 , wherein the at least two pixels are located at one row of the pixel array unit. 
     
     
         8 . A method of operating a CMOS image sensor comprising steps of:
 sensing an object by a pixel array unit, the pixel array unit comprising M pixels and P multiplexers, each of the M pixels being electrically connected to one of the P multiplexers wherein M is a positive integer and P is a positive integer smaller than or equal to M;   determining a sensing region corresponding to the object wherein the sensing region comprises N of the M pixels and N is a positive integer smaller than or equal to M;   generating a row selection signal; and   controlling Q multiplexers, which are electrically connected to the N pixels, to transmit the row selection signal to the N pixels wherein Q is a positive integer smaller than or equal to N and smaller than or equal to P.   
     
     
         9 . The method of  claim 8 , further comprising step of reading signals generated by the N pixels of the sensing region in row-major order. 
     
     
         10 . The method of  claim 8 , further comprising step of adding at least one dummy pixel to the sensing region when the sensing region exceeds a real region of the pixel array unit. 
     
     
         11 . The method of  claim 8 , wherein the sensing region is a parallelogram. 
     
     
         12 . The method of  claim 8 , wherein when P is smaller than M, at least two of the M pixels are electrically connected to one of the P multiplexers simultaneously and the at least two pixels are located at different columns of the pixel array unit. 
     
     
         13 . The method of  claim 12 , wherein the at least two pixels are located at one row of the pixel array unit. 
     
     
         14 . A CMOS image sensor comprising:
 a pixel array unit for sensing an object, the pixel array unit comprising M pixels, wherein M is a positive integer;   a row selection unit, electrically connected to the pixel array unit, for generating a row selection signal, the row selection signal controlling the M pixels to output signals;   a read-out circuit, electrically connected to the pixel array unit, for reading signals generated by the M pixels; and   a logic circuit, electrically connected to the read-out circuit, for determining a sensing region corresponding to the object wherein the sensing region comprises N of the M pixels and N is a positive integer smaller than or equal to M, the logic circuit determining a first pixel and a last pixel for each row within the sensing region and controlling the read-out circuit to read the first pixel through the last pixel of each row in row-major order, so as to output signals generated by the N pixels.   
     
     
         15 . The CMOS image sensor of  claim 14 , wherein when the sensing region exceeds a real region of the pixel array unit, the read-out circuit adds at least one dummy pixel to the sensing region. 
     
     
         16 . The CMOS image sensor of  claim 14 , wherein the sensing region is a parallelogram. 
     
     
         17 . A method of operating a CMOS image sensor comprising steps of:
 sensing an object by a pixel array unit, the pixel array unit comprising M pixels wherein M is a positive integer;   determining a sensing region corresponding to the object wherein the sensing region comprises N of the M pixels and N is a positive integer smaller than or equal to M;   generating a row selection signal for controlling the M pixels to output signals;   determining a first pixel and a last pixel for each row within the sensing region;   reading the first pixel through the last pixel of each row in row-major order; and   outputting signals generated by the N pixels.   
     
     
         18 . The method of  claim 17 , further comprising step of adding at least one dummy pixel to the sensing region when the sensing region exceeds a real region of the pixel array unit. 
     
     
         19 . The method of  claim 17 , wherein the sensing region is a parallelogram.