Led array

Abstract

Methods for fabricating light-emitting diode (LED) array structures comprising multiple vertical LED stacks coupled to a single metal substrate is provided. The LED array structure may comprise two, three, four, or more LED stacks arranged in any configuration. Each of the LED stacks may have an individual external connection to make a common anode array since the p-doped regions of the LED stacks are all coupled to the metal substrate, or some to all of the n-doped regions of the LED stacks may be electrically connected to create a parallel LED array. Such LED arrays may offer better heat conduction and improved matching of LED characteristics (e.g., forward voltage and emission wavelength) between the individual LED stacks compared to conventional LED arrays.

1 . A method for fabricating a light-emitting diode (LED) array, the method comprising:
 providing a wafer assembly comprising:
 a metal substrate; 
 a plurality of LED stacks disposed above the metal substrate; and 
 a conductive contact disposed above each of the LED stacks; 
   testing the LED stacks to determine functional LED stacks;   forming at least one interconnect coupling the conductive contact of a first LED stack to the conductive contact of a second LED stack;   forming an insulator disposed between the at least one interconnect and the metal substrate; and   dicing the wafer assembly to yield the LED array, such that the LED array comprises a group of two or more functional LED stacks disposed on a detached portion of the metal substrate, wherein the first and second LED stacks will be part of the group of functional LED stacks.   
     
     
         2 . The method of  claim 1 , wherein the at least one interconnect comprises a gold wire or a metal trace. 
     
     
         3 . The method of  claim 2 , wherein the metal trace is formed by at least one of deposition, sputtering, evaporation, electroplating, electroless plating, coating, and printing. 
     
     
         4 . The method of  claim 1 , wherein the insulator comprises an organic material selected from the group consisting of an epoxy, a polymer, a parylene, a polyimide, a thermoplastic, and a sol-gel. 
     
     
         5 . The method of  claim 1 , wherein the insulator comprises an inorganic material selected from the group consisting of SiO2, Si3N4, ZnO, Ta2O5, TiO2, HfO, and MgO. 
     
     
         6 . The method of  claim 1 , wherein the insulator is formed by at least one of deposition, sputtering, evaporation, anode oxidation, coating, and printing. 
     
     
         7 . The method of  claim 1 , wherein the metal substrate comprises a single layer or multiple layers. 
     
     
         8 . The method of  claim 1 , wherein the metal substrate comprises a metal or a metal alloy selected from Cu, Cu alloy, and composite metal alloy. 
     
     
         9 . The method of  claim 1 , wherein each of the plurality of LED stacks comprises:
 a p-doped layer disposed above the metal substrate;   an active layer for emitting light disposed above the p-doped layer; and   an n-doped layer disposed above the active layer.   
     
     
         10 . The method of  claim 9 , wherein the p-doped layer, the n-doped layer, or the active layer comprises Al x In y Ga 1-x-y N, Al x In y Ga 1-x-y P, or Al x Ga 1-x As, where 0≦x≦1 and 0≦y≦1-x. 
     
     
         11 . The method of  claim 1 , wherein the wafer assembly comprises a reflective layer disposed between the plurality of LED stacks and the metal substrate. 
     
     
         12 . The method of  claim 11 , wherein the reflective layer comprises at least one of Ag, Al, Ni, Pd, Au, Pt, Ti, Cr, Vd, and combinations thereof. 
     
     
         13 . The method of  claim 1 , wherein at least two of the group of functional LED stacks were adjacent on the wafer assembly. 
     
     
         14 . The method of  claim 1 , further comprising coupling each conductive contact in the LED array to a lead for external connection. 
     
     
         15 . The method of  claim 1 , further comprising at least partially encasing the LED array in a housing. 
     
     
         16 . A method for fabricating a light-emitting diode (LED) array, the method comprising:
 providing a wafer assembly comprising:
 a metal substrate; 
 a plurality of LED stacks disposed above the metal substrate; and 
 a conductive contact disposed above each of the LED stacks; 
   testing the LED stacks to determine functional LED stacks;   forming at least one interconnect coupling the conductive contact of a first LED stack to the conductive contact of a second LED stack;   forming a means to prevent electrical shorting between the at least one interconnect and the metal substrate; and   dicing the wafer assembly to yield the LED array, such that the LED array comprises a group of two or more functional LED stacks disposed on a detached portion of the metal substrate, wherein the first and second LED stacks will be part of the group of functional LED stacks.   
     
     
         17 . A test system comprising:
 a wafer assembly comprising:
 a metal substrate; 
 a plurality of light-emitting diode (LED) stacks disposed above the metal substrate; and 
 a conductive contact disposed above each of the LED stacks; and 
   a tester configured to determine which of the LED stacks are functional and create a scheme for dicing the wafer assembly into a plurality of LED arrays based on locations of the LED stacks determined to be functional, wherein each of the LED arrays comprises a group of two or more functional LED stacks disposed on a detached portion of the metal substrate.   
     
     
         18 . The test system of  claim 17 , wherein the tester is configured to create an image of the wafer assembly illustrating the locations of the functional LED stacks. 
     
     
         19 . The test system of  claim 17 , wherein the tester is configured to generate a program for dicing the wafer assembly based on the locations of the functional LED stacks and to send the program to a dicing device for execution. 
     
     
         20 . The test system of  claim 17 , wherein the tester is configured to create a mask based on the locations of the functional LED stacks for at least partially removing nonfunctional LED stacks from the wafer assembly and/or for dicing the wafer assembly. 
     
     
         21 . The test system of  claim 17 , wherein the scheme is based on groups of four or more adjacent functional LED stacks arranged in a row. 
     
     
         22 . The test system of  claim 17 , wherein the scheme is based on groups of four adjacent functional LED stacks arranged in a square. 
     
     
         23 . The test system of  claim 17 , wherein the scheme is based on a combination of arrangements of the functional LED stacks. 
     
     
         24 . The test system of  claim 17 , wherein the tester is configured to determine placements for interconnects between pairs of functional LED stacks. 
     
     
         25 . The test system of  claim 24 , wherein the tester is configured to determine placements for insulators between the interconnects and the metal substrate based on the locations of the functional LED stacks.