Nonvolatile memories with laterally recessed charge-trapping dielectric

Abstract

Charge-trapping dielectric ( 160 ) in a nonvolatile memory cell is recessed from under the control gate's edge and/or from an edge of a substrate isolation region. The recessed geometry serves to reduce or eliminate charge trapping in regions from which the charge may be difficult to erase.

1 . A method for manufacturing a nonvolatile memory cell comprising:
 an active area formed in a semiconductor region and comprising the memory cell's source/drain regions and the memory cell's channel region;   a first conductive gate overlying the active area and having a lateral edge overlying the active area;   a charge-trapping dielectric for storing electric charge to define a state of the memory cell, the charge trapping dielectric being positioned between the active area and the first conductive gate;   the method comprising:   forming a charge-trapping dielectric layer to provide the charge-trapping dielectric;   forming a first conductive layer to provide the first conductive gate, the first conductive layer comprising said lateral edge over the active area; and then   laterally etching the charge-trapping dielectric layer to laterally recess the charge trapping dielectric layer away from the lateral edge of the first conductive gate.   
     
     
         2 . The method of  claim 1  further comprising forming a tunnel dielectric between the charge-trapping dielectric and the active area. 
     
     
         3 . The method of  claim 1  further comprising oxidizing at least a portion of the semiconductor region under the lateral edge of the first conductive gate.