Method for balancing current
Abstract
A method for method for inhibiting thermal run-away in a multi-phase power converter at varying load transition rates. A multi-phase power converter having an on-time is provided and the frequency of the multi-phase power converter is adjusted so that a load step period and the on time of the multi-phase power converter are in a temporal relationship. Alternatively, a load step rate is inhibited from locking onto a phase current of the multi-phase power converter by suspending an oscillator signal. In accordance with another alternative, a load step rate is inhibited from locking onto a phase current of the multi-phase power converter by suspending an oscillator signal and dithering an input signal to the oscillator.
Claims
exact text as granted — not AI-modified1 : A method for balancing current in a multi-phase power converter at varying load transition rates, comprising:
providing the multi-phase power converter having an on-time; and adjusting the frequency of the multi-phase power converter so that a load step period and the on-time of the multi-phase power converter are in a temporal relationship.
2 : The method of claim 1 , wherein the temporal relationship is one of coincident, similar, or the same.
3 : The method of claim 1 , wherein providing the multi-phase power converter includes:
providing an error amplifier having an output; providing an oscillator having an output; coupling the output of the error amplifier to a first input of a pulse width modulator; coupling the output of the oscillator to a second input of the pulse width modulator; and providing a first power stage having an input coupled to an output of the pulse width modulator.
4 : The method of claim 3 , further including:
coupling a second power stage having an input to another output of the pulse width modulator; coupling a first inductor between the output of the first power stage and an output node; coupling a second inductor between the output of the second power stage and the output node; and coupling the output node to an input of the error amplifier.
5 : The method of claim 1 , wherein the temporal relationship between the on-time of the multi-phase power converter and the load step is a coincidental relationship.
6 : The method of claim 1 , wherein the multi-phase power converter is a 4-phase power converter.
7 : The method of claim 1 , wherein the multi-phase power converter is one of a 2-phase power converter or a 3-phase power converter.
8 : The method of claim 1 ., further including coupling a dither circuit to the Multi-phase power converter.
9 : The method of claim 1 , wherein adjusting the on-time of the multi-phase power converter includes dithering an oscillator signal.
10 : The method of claim 1 , Wherein adjusting the on-time of the multi-phase power converter includes one of suspending an oscillator signal or phase Shifting the oscillator signal.
11 . (canceled)
12 . (canceled)
13 . (canceled)
14 . (canceled)
15 . (canceled)
16 . (canceled)
17 . (canceled)
19 . (canceled)
20 . (canceled)Join the waitlist — get patent alerts
Track US2010327827A1 — get alerts on status changes and closely related new filings.
We store only your email — no account needed. See our privacy policy.