Resistance change type memory

Abstract

A resistance change type memory includes first, second and third drive lines, a resistance change element having one end connected to the third drive line, a first diode having an anode connected to the first drive line and a cathode connected to other end of the first resistance change element, a second diode having an anode connected to other end of the first resistance change element and a cathode connected to the second drive line, and a driver/sinker which supplies a write current to the resistance change element. A write control circuit is arranged such that when first data is written, the write current is caused to flow in a direction from the first drive line to the third drive line, and when second data is written, the write current is caused to flow in a direction from the third drive line to the second drive line.

1 . A resistance change type memory comprising:
 a first drive line extending in a first direction;   a second drive line extending in a second direction intersecting the first direction;   a resistance change element and a zener diode which are connected in series between the first and second drive lines;   a driver/sinker which supplies a write current to the resistance change element; and   a write control circuit arranged such that the write current is caused to flow in a direction from the first drive line to the second drive line, when first data is written to the resistance change element, and the write current is caused to flow in a direction from the second drive line to the first drive line, when second data is written to the resistance change element.   
     
     
         2 . The memory of  claim 1 , further comprising conductive lines which extend in the first direction,
 wherein the first drive line and the conductive lines function as word lines, and   the write control circuit causes the word lines except the first drive line to float, when the first and second data are written to the resistance change element.   
     
     
         3 . The memory of  claim 1 , further comprising conductive lines which extend in the second direction,
 wherein the second drive line and the conductive lines function as bit lines, and   the write control circuit causes the bit lines except the second drive line to float, when the first and second data are written to the resistance change element.   
     
     
         4 . The memory of  claim 1 , further comprising conductive lines which extend in the second direction,
 wherein the second drive line and the conductive lines function as bit lines, and   the write control circuit makes electric potentials of the bit lines except the second drive line equal to an electric potential of the first drive line, when the first and second data are written to the resistance change element.   
     
     
         5 . The memory of  claim 1 ,
 wherein the write current is caused to flow in a reverse direction of the zener diode, when the first data is written to the resistance change element, and the write current has a value such that a voltage applied to the zener diode is made equal to or larger than the zener voltage thereof.   
     
     
         6 . The memory of  claim 1 ,
 wherein a voltage applied to the zener diode is made less than the zener voltage thereof, when the first data is not written to the resistance change element.   
     
     
         7 . The memory of  claim 1 ,
 wherein the write current is caused to flow in a forward direction of the zener diode, when the second data is written to the resistance change element.   
     
     
         8 . The memory of  claim 1 ,
 wherein a read current is caused to flow in a forward direction of the zener diode, when data stored in the resistance change element is read, and the read current is smaller than the write current.   
     
     
         9 . The memory of  claim 1 ,
 wherein the zener diode is provided in a semiconductor layer on an insulation layer.   
     
     
         10 . The memory of  claim 1 ,
 wherein the zener diode is provided in a semiconductor substrate.   
     
     
         11 . The memory of  claim 1 ,
 wherein the resistance change element is provided above the zener diode.   
     
     
         12 . The memory of  claim 1 ,
 wherein the zener diode is a schottky diode.   
     
     
         13 . The memory of  claim 1 ,
 wherein the resistance change element comprises oxides of one or more element selected from Ti, V, Fe, Co, Y, Zr, Nb, Mo, Hf, Ta, W, Ge, Si.   
     
     
         14 . The memory of  claim 13 ,
 wherein the resistance change element is interposed between an electrode comprising one of Ag and Cu and another electrode comprising one of TiW, Ti, and W.   
     
     
         15 . The memory of  claim 1 ,
 wherein the resistance change element comprises one of Cr 2 O 3 , CrO 2 , MoO 2 , MO 2 O 5 , WO 2 , a mixed crystal of Cr 2 O 3  and CrO 2 , a mixed crystal of MoO 2  and Mo 2 O 5 , and a mixed crystal of WO 2  and WO 3 .   
     
     
         16 . The memory of  claim 1 ,
 wherein the resistance change element comprises one of NiCr 2 O 4 , MnCr 2 O 4 , FeCr 2 O 4 , CoCr 2 O 4 , CuCr 2 O 4 , and ZnCr 2 O 4 .   
     
     
         17 . The memory of  claim 1 ,
 wherein the resistance change element is a magneto-resistive element.