US2011007917A1PendingUtilityA1

Two Chip Solution Band Filtering

Assignee: SWAT ACR PORTFOLIO LLCPriority: Jul 9, 2009Filed: Jul 9, 2009Published: Jan 13, 2011
Est. expiryJul 9, 2029(~2.9 yrs left)· nominal 20-yr term from priority
Inventors:Gibson Elliot
H04R 3/005H04R 25/407H04S 2420/07H04R 25/552
45
PatentIndex Score
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Cited by
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References
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Claims

Abstract

A behind the ear earpiece 205 capable of multiband filtering with multiple core processors incorporated on a miniature solid state chip. The apparatus includes a plurality of microphones 305 a - n and a plurality of pre-amplifiers 310 a - n, an analog to digital converter 320, a digital signal processor 325 and a digital to analog converter 335 all hidden behind the ear of a user 215 with a battery. All are connected to a speaker 325 attached for producing an acoustic signal to the user 215. The method of the invention provides a compact multiband filter using a plurality of processors 405 connected to one another with single drop busses 410. Groups 415, 420, 425, 430, 435, 440, 445 and 450 520, 530, 535, 545 of processors are assigned to each particular band and each group performs multiple multiply-accumulate (“MAC”) calculations 520, 530, 535 and 545. Each MAC 520, 530, 535 and 545 is accomplished with use of the multiple registers in each core 405.

Claims

exact text as granted — not AI-modified
1 . An earpiece comprising: a plurality of microphones for producing an electrical signal proportional to a received acoustic signal; and, a plurality of pre-amplifiers connected by means of a plurality of data and control paths to said plurality of microphones for increasing the amplitude of the electrical analog signal, an analog to digital converter connected to said plurality of preamplifiers; and, a digital signal processor connected to the output of said analog to digital converter; and, a digital to analog converter connected to the output of said signal processor; and; a speaker attached to the output of said digital to analog converter for producing a acoustic signal proportional to the output of said digital to analog converter. 
     
     
         2 . An earpiece as in  claim 1 , wherein said preamplifiers are connected to said analog to digital converter by a plurality of variable attenuators also connected and controlled by said digital signal processor. 
     
     
         3 . An earpiece as in  claim 1 , further comprising a post processing amplifier for increasing the strength of said digital signal processor connected to said digital to analog converter. 
     
     
         4 . An earpiece as in  claim 1 , wherein said signal processor comprises a plurality of processing devices communicating with four neighboring processing devices over a single drop bus with no common bus on a single semiconductor chip. 
     
     
         5 . An earpiece as in  claim 4 , wherein said signal processor divides the input into bands that are spread across the array of processing devices each of which separate the audio samples into predefined frequency ranges. 
     
     
         6 . An earpiece as in  claim 5 , wherein said signal processor divides the input into eight bands. 
     
     
         7 . An earpiece as in  claim 6 , wherein said signal processor comprises four processing devices for performing the band filtering for a particular frequency band. 
     
     
         8 . An earpiece as in  claim 4 , wherein said signal processor comprises a second order Chebyshev filter. 
     
     
         9 . An earpiece as in  claim 8 , wherein said signal processor processes multiple frequency bands and comprises a second order Chebyshev filter performed three times sequentially totaling a sixth order Chebyshev filter for each band. 
     
     
         10 . An earpiece as in  claim 8 , wherein said signal processor the second order Chebyshev filter is divided into three categories bandpass, lowpass, and highpass. 
     
     
         11 . A method for performing a band filtering operation with a multi processing device computer comprising the steps of, assigning a group of processing devices a particular band to process, and, verifying that a sample has been received by a first processing device, and if a sample has been received passing said sample to a second processing device, and, performing a multiply-accumulate (“MAC”) calculation on said sample, and, passing the results of said MAC calculation to a third processing device and storing the results in a first register, and, selecting an alternative register for storing the result of the MAC, and alternating between said first and said alternate register for establishing a bandpass result. 
     
     
         12 . A method for performing a band filtering operation with a multi processing device computer as in  claim 11 , wherein there are additional MAC steps to total three MAC steps before an alternative register is chosen. 
     
     
         13 . A method for performing a band filtering operation with a multi processing device computer as in  claim 12 , where there is a total of four MAC steps before the alternative register is chosen. 
     
     
         14 . A method for performing a band filtering operation with a multi processing device computer as in  claim 11 , wherein each MAC unit updates the contents of two sequential registers in the non-volatile memory (“NVM”) of the processing device in which the calculation is being performed. 
     
     
         15 . A method for performing a band filtering operation with a multi processing device computer as in  claim 11 , wherein each of the MAC calculations perform the same function, but the registers within the processing device whose values are utilized in the calculation of the MAC are initialized to different values for each MAC calculation. 
     
     
         16 . A method for performing a band filtering operation with a multi processing device computer as in  claim 11 , wherein each MAC calculation is comprised of the steps of, initializing two sequential registers in the NVM, and further initializing registers utilized for the purpose of performing a multiplication, and, performing a multiplication, and, yet further initializing the registers utilized for the purpose of performing a multiplication of one less bit, performing a one less bit multiplication, and updating the two sequential registers in the NVM in the processing device in which the calculation is being performed with the combined results from said first and the second multiplications. 
     
     
         17 . A method for performing a band filtering operation with a multi processing device computer as in  claim 16 , wherein said first multiplication is a 36 bit multiplication and said second multiplication is a 35 bit multiplication.

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