US2011013078A1PendingUtilityA1

Head-separated camera device

Assignee: SHINOZAKI HIROSHIPriority: Jul 15, 2009Filed: Jun 9, 2010Published: Jan 20, 2011
Est. expiryJul 15, 2029(~3 yrs left)· nominal 20-yr term from priority
H04N 23/66H04N 23/555
43
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Claims

Abstract

According to one embodiment, a head-separated camera device includes an imaging unit, a control unit configured to control the imaging unit and a connection unit configured to connect the imaging unit and the control unit. The imaging unit includes a sensor configured to capture an image to provide a video signal, a superimposition module configured to superimpose, on serial data, the video signal, the synchronization signal, and the clock signal, the serial data serving to reproduce the image captured by the sensor, and a transmitter configured to transmit the serial data to the control unit. The control unit includes a receiver configured to receive the serial data and a separation module configured to separate the serial data received by the receiver, into the video signal, the synchronization signal, and the clock signal.

Claims

exact text as granted — not AI-modified
1 . A head-separated camera device comprising an imaging unit, a control unit configured to control the imaging unit, and a connection unit configured to connect the imaging unit with the control unit, wherein the imaging unit comprises
 a sensor configured to capture an image to provide a video signal, a synchronization signal, and a clock signal,   a superimposition module configured to superimpose, on serial data, the video signal, the synchronization signal, and the clock signal, the serial data serving to reproduce the image captured by the sensor, and   a transmitter configured to transmit the serial data to the control unit, and   the control unit comprises   a receiver configured to receive the serial data,   a separation module configured to separate the serial data received by the receiver, into the video signal, the synchronization signal, and the clock signal,   a video processor configured to perform a video processing by using the video signal, the synchronization signal, and the clock signal, and   a timing signal generator configured to output, to the sensor, a sensor-driving synchronization signal and a sensor-driving clock signal.   
     
     
         2 . The device of  claim 1 , wherein the sensor is configured to supply the superimposition module with phase-aligned or phase-matched signals of the video signal, the synchronization signal, and the clock signal, based on the sensor-driving synchronization signal and the sensor-driving clock signal. 
     
     
         3 . The device of  claim 1 , wherein
 the timing signal generator is configured to supply the superimposition module with the sensor-driving clock signal,   the sensor is configured to supply the superimposition module with the video signal and the synchronization signal, based on the sensor-driving synchronization signal and the sensor-driving clock signal, and   the superimposition module is configured to superimpose the sensor-driving clock signal as the clock signal on the video signal and the synchronization signal.   
     
     
         4 . The device of  claim 3 , wherein the imaging unit comprises a delay module configured to delay the video signal and the synchronization signal from the sensor to match a phase of each of the video signal and the synchronization signal from the sensor with a phase of the sensor-driving clock signal. 
     
     
         5 . The device of  claim 1 , wherein the transmitter is configured to transmit the serial data through a transfer line including one channel or a plurality of channels. 
     
     
         6 . The device of  claim 5 , wherein the transmitter is configured to switch a number of channels to be used, depending on a transfer rate. 
     
     
         7 . The device of  claim 1 , wherein the connection unit is configured to adopt a cable according to a Power Over Camera Link standard.

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