US2011073041A1PendingUtilityA1

Epitaxially Coated Semiconductor Wafer and Device and Method For Producing An Epitaxially Coated Semiconductor Wafer

Assignee: SILTRONIC AGPriority: Nov 22, 2006Filed: Sep 28, 2010Published: Mar 31, 2011
Est. expiryNov 22, 2026(~0.3 yrs left)· nominal 20-yr term from priority
H10P 72/7611H10P 14/3411H10P 14/2905H10P 14/20H10P 14/3444C30B 25/12C23C 16/4585Y10T428/24612
45
PatentIndex Score
0
Cited by
0
References
0
Claims

Abstract

In a method for producing epitaxially coated semiconductor wafers, a multiplicity of prepared, front side-polished semiconductor wafers are successively coated individually with an epitaxial layer on their polished front sides at temperatures of 800-1200° C. in a reactor, while supporting the prepared semiconductor wafer over a susceptor having a gas-permeable structure, on a ring placed on the susceptor which acts as a thermal buffer between the susceptor and the supported semiconductor wafer, the semiconductor wafer resting on the ring, and its backside facing but not contacting the susceptor, so that gaseous substances are delivered from a region over the backside of the semiconductor wafer by gas diffusion through the susceptor into a region over the backside of the susceptor, the semiconductor wafer contacting the ring only in an edge region of its backside, wherein no stresses measurable by means of photoelastic stress measurement (“SIRD”) occur in the semiconductor wafer.

Claims

exact text as granted — not AI-modified
1 . A device for supporting a semiconductor wafer during the deposition of a layer on a front side of the semiconductor wafer by chemical vapor deposition in a deposition reactor, comprising a susceptor which has a gas-permeable structure, and a ring on the susceptor which acts as a thermal buffer between the susceptor and the supported semiconductor wafer, and is positioned between the wafer and the susceptor. 
     
     
         2 . The device of  claim 1 , wherein the ring comprises silicon carbide. 
     
     
         3 . The device of  claim 1 , wherein the ring comprises graphite coated with silicon carbide. 
     
     
         4 . The device of  claim 1 , wherein the ring material has a thermal conductivity of 5-100 W/mK at a temperature of 1000° C. 
     
     
         5 . The device of  claim 1 , wherein the ring material has a thermal conductivity of 5-50 W/mK at a temperature of 1000° C. 
     
     
         6 . The device of  claim 1 , wherein the ring material has a thermal conductivity of 10-30 W/mK at a temperature of 1000° C. 
     
     
         7 . The device of  claim 1 , wherein the susceptor and the ring have dimensions configured to receive a semiconductor wafer with a diameter selected from the group consisting of 150 mm, 200 mm, 300 mm and 450 mm diameters. 
     
     
         8 . The device of  claim 7 , wherein an inner diameter of the ring is less than the diameter of the semiconductor wafer for which the susceptor and the ring are configured. 
     
     
         9 . The device of  claim 8 , wherein the ring has an annular recess having a width of 5-15 mm and a depth of 0.3-0.7 mm, in the direction of its inner diameter. 
     
     
         10 . The device of  claim 9 , wherein the ring has a thickness of 0.5-1.5 mm. 
     
     
         11 . The device of  claim 1 , wherein the susceptor has a porosity of at least 15% and a density of 0.5-1.5 g/cm 3 . 
     
     
         12 - 21 . (canceled)

Join the waitlist — get patent alerts

Track US2011073041A1 — get alerts on status changes and closely related new filings.

We store only your email — no account needed. See our privacy policy.