US2011073826A1PendingUtilityA1
Phase change memory device and fabrication method thereof
Est. expirySep 30, 2029(~3.2 yrs left)· nominal 20-yr term from priority
H10N 70/8828H10N 70/231H10N 70/068H10B 63/20H10N 70/826H10N 70/8413H10N 70/011
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Claims
Abstract
A phase change memory device is provided that includes a switching device, a bottom electrode contact in contact with the switching device and a porous spacer formed on the bottom electrode contact.
Claims
exact text as granted — not AI-modified1 . A phase change memory device, comprising:
a switching device; a bottom electrode contact in contact with the switching device; and a porous spacer formed on a portion of the bottom electrode contact.
2 . The phase change memory device of claim 1 , wherein the porous spacer is comprised of a germanium compound.
3 . The phase change memory device of claim 2 , wherein the germanium compound comprises silicon-germanium.
4 . The phase change memory device of claim 2 , wherein the germanium compound comprises silicon-germanium-nitride.
5 . A method of manufacturing a phase change memory device, comprising the steps of:
forming a bottom electrode contact hole to expose a switching device on a semiconductor substrate; forming an insulating layer on a resultant structure of the semiconductor substrate including the bottom electrode contact hole by using an insulating compound having materials of different atomic sizes; and forming an insulating spacer within the bottom electrode contact hole by selectively etching the insulating layer.
6 . The method of claim 5 , wherein the step of forming an insulating layer comprises repeatedly depositing a plurality of insulating materials having different atomic sizes at least one or more times in a pre-arranged order.
7 . The method of claim 5 , wherein the insulating compound comprises a germanium compound.
8 . The method of claim 7 , wherein the germanium compound comprises silicon-germanium.
9 . The method of claim 8 , wherein the step of forming an insulating layer comprises repeatedly depositing a silicon layer and a germanium layer at least one or more times in a pre-arranged order.
10 . The method of claim 8 , wherein the insulating layer is a Ge-rich insulating layer.
11 . The method of claim 8 , wherein the insulating layer is a Si-rich insulating layer.
12 . The method of claim 7 , wherein the germanium compound comprises silicon-germanium-nitride.
13 . The method of claim 12 , wherein the step of forming an insulating layer comprises repeatedly depositing each of a silicon layer, a germanium layer and a nitride layer at least one or more time in a pre-arranged order.
14 . The method of claim 13 , wherein after forming the silicon layer, the germanium layer and the nitride layer, further carrying out purge processes, respectively,
wherein a purge time of a purge process carried out after forming the nitride layer is two to three times longer than a purge time of a purge process carried out after forming the silicon layer and the germanium layer.
15 . The method of claim 12 , wherein the insulating layer comprises a Ge-rich insulating layer.
16 . The method of claim 12 , wherein the insulating layer comprises a Si-rich insulating layer.
17 . The method of claim 12 , wherein the step of forming an insulating layer comprises forming a Ge-rich insulating layer by sequentially depositing a silicon layer, a germanium layer and a nitride layer at least one or more times.
18 . The method of claim 12 , wherein the step of forming an insulating layer comprises forming a Si-rich insulating layer by sequentially depositing a silicon layer, a germanium layer and a nitride layer at least one or more times.
19 . The method of claim 12 , wherein the step of forming an insulating layer comprises forming a Ge-rich insulating layer by sequentially depositing a silicon layer, a nitride layer and a germanium layer at least one or more times.
20 . The method of claim 12 , wherein the step of forming an insulating layer comprises forming a Si-rich insulating layer by sequentially depositing a silicon layer, a nitride layer and a germanium layer at least one or more times.
21 . The method of claim 5 , wherein the step of forming an insulating layer comprises depositing a plurality of insulating materials having different atomic sizes by using a chemical vapor deposition method.
22 . A method of manufacturing a phase change memory device, comprising the steps of:
forming a switching device on a semiconductor substrate; forming a bottom electrode contact hole to an upper portion of the switching device; and forming a porous spacer on a portion of the bottom electrode contact hole.
23 . The method of claim 22 , wherein the step of forming a porous spacer comprises;
forming a porous insulating layer on a resultant structure of the semiconductor substrate including the bottom electrode contact hole; and space-etching the porous insulating layer.
24 . The method of claim 23 , wherein the porous insulating layer is formed by using a germanium compound.
25 . The method of claim 24 , wherein the germanium compound comprises silicon-germanium.
26 . The method of claim 25 , wherein the step of forming a porous insulating layer comprises sequentially depositing a silicon layer and a germanium layer at least one or more times.
27 . The method of claim 26 , wherein the porous insulating layer comprises a Ge-rich insulating layer.
28 . The method of claim 26 , wherein the insulating porous layer comprises a Si-rich insulating layer.
29 . The method of claim 24 , wherein the germanium compound comprises silicon-germanium-nitride.
30 . The method of claim 29 , wherein the porous insulating layer comprises a Ge-rich insulating layer.
31 . The method of claim 29 , wherein the insulating layer comprises a Si-rich insulating layer.
32 . The method of claim 29 , wherein after forming the silicon layer, the germanium layer and the nitride layer, further comprising carrying out purge processes respectively,
wherein a purge time of a purge process carried out after forming the nitride layer is two to three times longer than a purge time of a purge process carried out after the silicon layer and the germanium layer.
33 . The method of claim 23 , wherein the step of forming a porous insulating layer comprises depositing a plurality of insulating materials having different atomic sizes by a chemical vapor deposition method.Join the waitlist — get patent alerts
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