Clock data recovery and synchronization in interconnected devices

Abstract

For synchronizing a master device and a slave device connected by a data transfer link, the master device measures a phase offset in a signal received from the slave device with respect to the master's clock signal. The master determines a control symbol based on the phase offset. The master encodes the control symbol in a transmit signal for the slave. The slave decodes the control symbol from the signal received from the master. The slave uses the control symbol to adjust the phase shift to compensate for the phase offset of a signal to be transmitted to the master device. When the phase compensated signal is received at the master, its phase offset is smaller than the original phase offset. This procedure can be performed iteratively until the phase offset is within a desired tolerance.

1 . In a system having a master device connected to a plurality of slave devices by a plurality of data transfer links, wherein each of a plurality of signals received at the master device has a corresponding phase offset, an apparatus for reducing each phase offset, comprising:
 at the master device,   a clock source that generates a clock signal;   a plurality of first receivers, each coupled to receive a corresponding first received signal from a corresponding data transfer link to a corresponding slave device;   a plurality of first transmitters, each coupled to the corresponding data transfer link;   a plurality of phase control modules, each coupled to a corresponding first receiver, a corresponding first transmitter and the clock source, wherein each phase control module further comprises,   a phase comparator coupled to receive the clock signal and the corresponding first received signal, the phase comparator and determining a corresponding first phase offset between the corresponding first received signal and the clock signal;   a control symbol generator coupled to the phase comparator and generating a corresponding control symbol based on the corresponding first phase offset;   an encoder coupled to the control symbol generator and inserting the corresponding control symbol in a corresponding first transmit signal, wherein the corresponding first transmitter transfers the corresponding first transmit signal over the corresponding data transfer link to the corresponding slave device;   at each slave device,   a second receiver coupled to receive the corresponding first transmit signal from the corresponding data transfer link to form a corresponding second received signal;   a phase lock loop coupled to receive the corresponding second received signal, the phase lock loop generating a recovered clock signal synchronized with the corresponding second received signal;   a decoder coupled to the second receiver, the decoder extracting the corresponding control symbol from the corresponding second received signal;   a phase compensator coupled to the decoder and the phase lock loop, the phase compensator responding to the corresponding control symbol and the recovered clock signal to produce a corresponding second transmit signal having a corresponding phase shift in accordance with the corresponding control symbol; and   a second transmitter coupled to the phase compensator and the corresponding data transfer link, the second transmitter transmitting the corresponding second transmit signal over the corresponding data transfer link to the master device, wherein at the master device, the corresponding first receiver receives the corresponding second transmit signal to form a corresponding compensated received signal having a corresponding second phase offset that is smaller than the corresponding first phase offset of the corresponding first received signal.   
     
     
         2 . In a system having a master device connected to a plurality of slave devices by a plurality of data transfer links, wherein each of a plurality of signals received at the master device has a corresponding phase offset, an apparatus for reducing each phase offset, comprising:
 at the master device,   a plurality of first receivers each coupled to receive a corresponding first received signal from a corresponding data transfer link to a corresponding slave device;   a clock source that generates a clock signal;   a plurality of phase comparators coupled to the clock source, each phase comparator coupled to a corresponding first receiver and determining a corresponding first phase offset between the corresponding first received signal and the clock signal;   a plurality of clock phase adjusters coupled to receive the clock signal and the corresponding first phase offset, each clock phase adjuster applying a phase shift to the clock signal in a direction opposite to the corresponding first phase offset to form a corresponding phase shifted clock signal;   a plurality of phase compensators, each coupled to receive the corresponding phase shifted clock signal and forming a corresponding first transmit signal in accordance with the corresponding phase shifted clock signal;   a plurality of first transmitters each coupled to a corresponding phase compensator and the corresponding data transfer link, wherein each first transmitter transfers the corresponding first transmit signal over the corresponding data transfer link to the corresponding slave device;   at each slave device,   a second receiver coupled to receive the corresponding first transmit signal from the corresponding data transfer link to form a corresponding second received signal;   a phase lock loop coupled to receive the corresponding second received signal from the second receiver, the phase lock loop generating a recovered clock signal synchronized with the corresponding second received signal; and   a second transmitter responding to the recovered clock signal to form a corresponding second transmit signal synchronized with the recovered clock signal, the second transmitter transmitting the corresponding second transmit signal over the corresponding data transfer link to the master device, wherein at the master device, the corresponding first receiver receives the corresponding second transmit signal to form a corresponding compensated received signal having a corresponding second phase offset that is smaller than the corresponding first phase offset of the corresponding first received signal.