High thermal conductivity substrate for a semiconductor device

Abstract

A method and apparatus for packaging semiconductor dies for increased thermal conductivity and simpler fabrication when compared to conventional semiconductor packaging techniques are provided. The packaging techniques described herein may be suitable for various semiconductor devices, such as light-emitting diodes (LEDs), central processing units (CPUs), graphics processing units (GPUs), microcontroller units (MCUs), and digital signal processors (DSPs). For some embodiments, the package includes a ceramic substrate having an upper cavity with one or more semiconductor dies disposed therein and having a lower cavity with one or more metal layers deposited therein to dissipate heat away from the semiconductor dies. For other embodiments, the package includes a ceramic substrate having an upper cavity with one or more semiconductor dies disposed therein and having a lower surface with one or more metal layers deposited thereon for efficient heat dissipation.

1 . A method for fabricating semiconductor device with a thermally conductive package, the method comprising:
 providing a ceramic substrate having an upper surface and a lower surface;   disposing a semiconductor die above the upper surface of the ceramic substrate; and   depositing one or more metal layers adjacent to the lower surface of the ceramic substrate for dissipating heat away from the semiconductor die.   
     
     
         2 . The method of  claim 1 , wherein the upper surface is one surface of an upper cavity of the ceramic substrate and the semiconductor die is disposed within the upper cavity. 
     
     
         3 . The method of  claim 2 , further comprising at least partially filling the upper cavity with an encapsulation material. 
     
     
         4 . The method of  claim 1 , wherein the lower surface is one surface of a lower cavity of the ceramic substrate. 
     
     
         5 . The method of  claim 4 , wherein depositing the one or more metal layers comprises at least partially filling the lower cavity. 
     
     
         6 . The method of  claim 1 , wherein depositing the one or metal layers comprises depositing a seed metal layer adjacent to the lower surface and electroplating one or more additional metal layers adjacent to the seed metal layer. 
     
     
         7 . The method of  claim 1 , further comprising:
 adding a lead frame to the ceramic substrate; and   coupling the semiconductor die to the lead frame.   
     
     
         8 . The method of  claim 7 , wherein leads of the lead frame for external connection are exposed through an upper portion of the ceramic substrate. 
     
     
         9 . The method of  claim 1 , wherein the ceramic substrate comprises a plurality of thermal vias disposed in the ceramic substrate for transferring heat from the semiconductor die to the metal layers. 
     
     
         10 . The method of  claim 9 , wherein the thermal vias are electrically conductive. 
     
     
         11 . The method of  claim 9 , wherein the thermal vias comprise alumina coated silver powder. 
     
     
         12 . The method of  claim 1 , wherein the ceramic substrate comprises AlN or Al 2 O 3 . 
     
     
         13 . The method of  claim 1 , wherein the metal layers comprise at least one of Cu, Ni, Au, Ag, W, and alloys thereof. 
     
     
         14 . The method of  claim 1 , wherein the thickness of the one or more metal layers is greater than 50 μm. 
     
     
         15 . The method of  claim 1 , wherein the semiconductor die is a light-emitting diode (LED) die. 
     
     
         16 . A method for fabricating a semiconductor device with a thermally conductive package, the method comprising:
 stacking a plurality of green tape layers;   cofiring the plurality of green tape layers to yield a ceramic substrate having an upper surface and a lower surface;   adding a lead frame to the ceramic substrate;   coupling a semiconductor die to the lead frame such that the semiconductor die is disposed above the upper surface of the ceramic substrate; and   depositing one or more metal layers adjacent to the lower surface of the ceramic substrate for dissipating heat away from the semiconductor die.   
     
     
         17 . The method of  claim 16 , wherein cofiring the plurality of green tape layers is performed at temperatures greater than 1000° C. 
     
     
         18 . The method of  claim 16 , wherein cofiring the plurality of green tape layers is performed at temperatures greater than 1800° C. 
     
     
         19 . The method of  claim 16 , further comprising creating openings in the plurality of green tape layers before cofiring. 
     
     
         20 . The method of  claim 19 , wherein a first portion of the openings forms an upper cavity of the ceramic substrate, the upper surface is one surface of the upper cavity, and the semiconductor die is disposed within the upper cavity. 
     
     
         21 . The method of  claim 20 , further comprising at least partially filling the upper cavity with an encapsulation material. 
     
     
         22 . The method of  claim 20 , wherein a second portion of the openings forms a lower cavity of the ceramic substrate and the lower surface is one surface of the lower cavity. 
     
     
         23 . The method of  claim 22 , wherein depositing the one or more metal layers comprises at least partially filling the lower cavity. 
     
     
         24 . The method of  claim 16 , wherein at least one of the plurality of green tape layers has an electrically conductive portion coated thereon.