US2011116578A1PendingUtilityA1

Mobile Communication System with Integrated GPS Receiver

Assignee: MEDIATEK INCPriority: Oct 12, 2006Filed: Jan 25, 2011Published: May 19, 2011
Est. expiryOct 12, 2026(~0.2 yrs left)· nominal 20-yr term from priority
H04B 1/3805H04B 1/28
43
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Claims

Abstract

A receiver includes a mixer, a poly phase filter, a channel select filter, an analog-to-digital converter and a HI/LO side reject selection unit. The mixer downconverts a signal to generate an in-phase signal and a quadrature signal. The poly phase filter for generates differential IF signals based on the in-phase signal and the quadrature signal. The channel select filter filters out unwanted channel signals from the differential IF signals. The analog-to-digital converter converts the filtered signal into a digital output signal. The HI/LO side reject selection unit is coupled between the mixer and the poly phase filter and capable of rejecting image signals while the mixer is at a high side frequency or at a low side frequency.

Claims

exact text as granted — not AI-modified
1 . A receiver, comprising:
 a mixer, for downconverting a signal to generate an in-phase signal and a quadrature signal;   a poly phase filter, for generating differential IF signals based on the in-phase signal and the quadrature signal;   a channel select filter, for filtering out unwanted channel signals from the differential IF signals;   an analog-to-digital converter, for converting the filtered signal into a digital output signal; and   a HI/LO side reject selection unit, coupled between the mixer and the poly phase filter, capable of rejecting image signals while the mixer is at a high side frequency or at a low side frequency.   
     
     
         2 . The receiver as claimed in  claim 1 , further comprising:
 a reference frequency source, for providing a reference frequency to the analog-to-digital converter; and   a PLL unit, for receiving the reference frequency and generating a clock signal to the mixer for downconversion.   
     
     
         3 . The receiver as claimed in  claim 2 , further comprising an external clock source coupled to the reference frequency source. 
     
     
         4 . The receiver as claimed in  claim 1 , further comprising a low noise amplifier (LNA) coupled between an antenna and the mixer. 
     
     
         5 . The receiver as claimed in  claim 1 , further comprising a variable gain amplifier coupled between the channel select filter and the analog-to-digital converter. 
     
     
         6 . The receiver as claimed in  claim 1 , further comprising a programmable gain amplifier coupled between the channel select filter and the analog-to-digital converter. 
     
     
         7 . The receiver as claimed in  claim 1 , wherein the receiver is a global positioning system (GPS) receiver integrated with a system and the signal downconverted by the mixer is a GPS signal. 
     
     
         8 . A receiver, comprising:
 a clock source, for generating a reference clock signal at a first frequency;   a single-balanced mixer, having an input directed to two multipliers for downconverting a signal to generate an in-phase signal and a quadrature signal;   a poly phase filter, for generating differential IF signals based on the in-phase signal and the quadrature signal;   a channel select filter, for filtering out unwanted channel signals from the differential IF signals;   an analog-to-digital converter, for converting the filtered signal into a digital output signal, wherein a sampling rate of the analog-to-digital converter is based upon the reference clock signal;   a first divider, for dividing the reference clock signal;   a PLL unit, for generating a clock signal based on the divided reference clock signal; and   a second divider, for dividing the clock signal and transmitting a second divided clock signal to the single-balanced mixer.   
     
     
         9 . The receiver as claimed in  claim 8 , wherein the PLL unit comprises:
 a third divider, for dividing the clock signal;   a fourth divider, for dividing the clock signal from the third divider to generate a feedback signal;   a phase and frequency detector (PFD) unit, for measuring a phase difference and a frequency difference between the feedback signal and the divided reference clock signal to generate difference signals;   a charge pump circuit, for receiving and transferring the difference signals into a current;   a loop filter, for receiving and transferring the current into a voltage; and   a voltage controlled oscillator, for generating the clock signal based on the voltage.   
     
     
         10 . The receiver as claimed in  claim 9 , wherein when the first frequency is approximately 16.368 MHz, the first divider is a divide-by-1 circuit, the third divider is a divide-by-2 circuit, and the fourth divider is a divide-by-96 circuit. 
     
     
         11 . The receiver as claimed in  claim 9 , wherein when the first frequency is approximately 26 MHz, the first divider is a divide-by-4 circuit, the third divider is a divide-by-2 circuit, and the fourth divider is a divide-by-243 circuit. 
     
     
         12 . The receiver as claimed in  claim 8 , wherein the receiver is a global positioning system (GPS) receiver integrated with a system and the signal downconverted by the single-balanced mixer is a GPS signal. 
     
     
         13 . A portable electronic device, comprising:
 a cellular module, comprising a first reference clock signal;   a GPS module, comprising a GPS receiver and having a second reference clock signal; and   a controller;   wherein the GPS receiver comprises:   a mixer, for downconverting GPS signals to generate an in-phase signal and a quadrature signal;   a poly phase filter, for generating differential IF signals based on the in-phase signal and the quadrature signal;   a channel select filter, directly coupled to an output of the poly phase filter, for filtering out unwanted channel signals from the differential IF signals;   an analog-to-digital converter, for converting the filtered signal into a digital output signal; and   a phase locked loop (PLL) unit controlled by the controller to receive the first reference clock signal or the second reference clock signal for generating a clock signal to the mixer.   
     
     
         14 . The portable electronic device as claimed in  claim 13 , wherein the GPS receiver further comprises:
 a first divider, for dividing the first reference clock signal or the second reference clock signal; and   a second divider, for dividing the clock signal before entering the mixer;   and wherein the PLL unit comprises:   a third divider, for dividing the clock signal;   a fourth divider, for dividing the clock signal from the third divider for generating a feedback signal;   a phase and frequency detector (PFD) unit, for measuring a phase difference and a frequency difference between the feedback signal and the first divided reference clock signal or the second divided reference clock signal for generating difference signals;   a charge pump circuit, for receiving and transferring the difference signals into a current;   a loop filter, for receiving and transferring the current into a voltage; and   a voltage controlled oscillator, for generating the clock signal based on the voltage.   
     
     
         15 . The portable electronic device as claimed in  claim 14 , wherein the loop filter is embedded on-chip. 
     
     
         16 . A method for receiving signals, comprising:
 downconverting a signal to generate an in-phase signal and a quadrature signal;   generating differential IF signals each based on the in-phase signal and the quadrature signal;   filtering out unwanted channel signals from the differential IF signals; and   converting the filtered signal into a digital output signal.   
     
     
         17 . The method as claimed in  claim 16 , further comprising:
 rejecting image signals while the step of downconverting the signal is performed at a high side frequency or at a low side frequency.   
     
     
         18 . The method as claimed in  claim 16 , further comprising:
 providing a reference frequency to facilitate the step of converting the filtered signal into the digital output signal; and   generating a clock signal to facilitate the step of downconverting the signal based on the reference frequency.   
     
     
         19 . The method as claimed in  claim 16 , wherein the signal is a global positioning system (GPS) signal.

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