Dynamic random access memory device and method of determining refresh cycle thereof

Abstract

Provided are a dynamic random access memory device having reduced power consumption and a method of determining a refresh cycle of the dynamic random access memory device. The method includes: selecting one or more monitoring bits during first through n-th self refresh cycles, where “n” is a natural number equal to or greater than one; detecting whether the monitoring bits have errors during (n+1)-th through m-th self refresh cycles, where “m” is a natural number equal to or greater than n+1; and adjusting an (m+1)-th self refresh cycle according to whether the monitoring bits have errors.

1 . A method of determining a refresh cycle of a dynamic random access memory device, the method comprising:
 selecting one or more monitoring bits during first through n-th self refresh cycles, where “n” is a natural number greater than two, and selecting the monitoring bits comprises;   determining during an a-th self refresh cycle whether data bits stored in a memory array have errors using the data bits and error correction code (ECC) bits corresponding to the data bits, where “a” is a natural number which is equal to or greater than one and less than “n”, and   determining during an (a+1)-th self refresh cycle whether the data bits stored in the memory array have errors using the data bits and the ECC bits corresponding to the data bits when no errors occurred in the data bits during the a-th self refresh cycle, wherein the (a+1)-th self refresh cycle is longer than the ath self refresh cycle;   detecting whether the monitoring bits have errors during (n+1)-th through m-th self refresh cycles, where “m” is a natural number equal to or greater than n+1; and   adjusting an (m+1)-th self refresh cycle according to whether the monitoring bits have errors.