US2011127534A1PendingUtilityA1

ESD Induced Artifact Reduction Design for a Thin Film Transistor Image Sensor Array

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Assignee: WEISFIELD RICHARDPriority: Oct 14, 2008Filed: Feb 9, 2011Published: Jun 2, 2011
Est. expiryOct 14, 2028(~2.3 yrs left)· nominal 20-yr term from priority
H10F 39/18H10F 39/016H10F 39/028H10F 39/12
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Claims

Abstract

A method is provided for fabricating an image sensor array in a manner that reduces the potential for defects resulting from electrostatic discharge events during fabrication of the image sensor array. The method includes: forming at least one pixel over a substrate, the pixel including a switching transistor and a photo-sensitive cell; and forming a dielectric interlayer over the pixel. A key step in the method of the present invention is depositing a first conductive layer over the dielectric interlayer. After the first conductive layer is formed, the image sensor array is well protected from ESD events because the first conductive layer spreads out any charge induced by tribo-electric charging events that may occur during subsequent fabrication processing steps, thereby reducing the potential for localized damage to the switching transistors upon the occurrence of ESD events.

Claims

exact text as granted — not AI-modified
1 . An image sensor array having reduced potential defects from electrostatic discharge events during fabrication, comprising
 a substrate;   at least one pixel disposed on the substrate, the pixel including a switching transistor and a photo-sensitive cell, the switching transistor having a transistor electrode, and the photo-sensitive cell having a cell electrode;   a dielectric interlayer disposed over the switching transistor and the photo-sensitive cell; and   a connecting line disposed on the dielectric interlayer, the connecting line connected to a via through the dielectric interlayer to contact one of the transistor electrode and the cell electrode,   wherein a portion of the connecting line disposed on the dielectric interlayer comprises a second conductive layer disposed directly on a first conductive layer,   wherein a portion of the via contacting the electrode through the dielectric interlayer comprises the second conductive layer without the first conductive layer, and   whereby the pixels of the image sensor array are substantially protected from electrostatic discharge events during fabrication by the presence of the first conductive layer deposited over the dielectric interlayer.   
     
     
         2 . An image sensor array as recited in  claim 1 , wherein the first conductive layer is formed of titanium-tungsten. 
     
     
         3 . An image sensor array as recited in  claim 1 , wherein the second conductive layer further includes a second sub-layer over a first sub-layer. 
     
     
         4 . An image sensor array as recited in  claim 3 , wherein the first sub-layer have the same material as the first conductive layer. 
     
     
         5 . An image sensor array as recited in  claim 1 , wherein the switching transistor is a thin-film-transistor.

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