SEMICONDUCTOR DEVICE COMPRISING METAL-BASED eFUSES OF ENHANCED PROGRAMMING EFFICIENCY BY ENHANCING METAL AGGLOMERATION AND/OR VOIDING

Abstract

Metal fuses in semiconductor devices may be formed on the basis of additional mechanisms for obtaining superior electromigration in the fuse bodies. To this end, the compressive stress caused by the current-induced metal diffusion may be restricted or reduced in the fuse body, for instance, by providing a stress buffer region and/or by providing a dedicated metal agglomeration region. The concept may be applied to the metallization system and may also be used in the device level, when fabricating the metal fuse in combination with high-k metal gate electrode structures.

1 . A semiconductor device, comprising:
 an electrically programmable fuse comprising:
 a fuse body comprising a metal, said fuse body being configured to enable current-induced metal diffusion upon establishing a programming current in a current flow path of said fuse body; 
 contact regions connecting to said fuse body; and 
 a stress buffer region in direct mechanical contact with said fuse body so as to enable stress transfer from said fuse body into said stress buffer region, said stress buffer region being configured so as to substantially avoid generation of compressive stress within said stress buffer region during said current-induced metal diffusion. 
   
     
     
         2 . The semiconductor device of  claim 1 , further comprising a metallization system formed above a semiconductor layer, wherein said fuse is formed in said metallization system. 
     
     
         3 . The semiconductor device of  claim 1 , further comprising a device level formed in and above a semiconductor layer, wherein at least said fuse body and said stress buffer region are formed in said device level. 
     
     
         4 . The semiconductor device of  claim 3 , further comprising a gate electrode structure formed in said device level and comprising an electrode metal and a high-k dielectric gate insulation layer. 
     
     
         5 . The semiconductor device of  claim 1 , wherein said current flow path extends through at least a portion of said stress buffer region. 
     
     
         6 . The semiconductor device of  claim 5 , wherein said current flow path extends completely through said stress buffer region. 
     
     
         7 . The semiconductor device of  claim 1 , wherein said current flow path is positioned outside said stress buffer region. 
     
     
         8 . The semiconductor device of  claim 1 , wherein said fuse body has a first cross-sectional area perpendicular to a current flow direction of said current flow path and said stress buffer region has a second cross-sectional area that is greater than said first cross-sectional area. 
     
     
         9 . The semiconductor device of  claim 1 , further comprising a tensile-stressed dielectric material that is mechanically connected to at least a portion of said stress buffer region. 
     
     
         10 . The semiconductor device of  claim 1 , further comprising a second fuse body, wherein said fuse body and said second fuse body are separated along said current flow path by said stress buffer region. 
     
     
         11 . The semiconductor device of  claim 10 , further comprising a second stress buffer region that is mechanically coupled to one of said fuse body and said second fuse body. 
     
     
         12 . A semiconductor device, comprising:
 an electrically programmable fuse comprising:
 a fuse body comprising a metal and having a metal extrusion portion; 
 contact regions connecting to said fuse body; 
 a metal accumulation region positioned adjacent to said metal extrusion portion, said metal accumulation region being configured to receive metal from said metal extrusion portion upon establishing a current flow in said fuse body; and 
 a dielectric material enclosing at least a portion of said fuse body. 
   
     
     
         13 . The semiconductor device of  claim 12 , further comprising a metal-containing extrusion region formed adjacent to said extrusion portion and being separated therefrom by a portion of said dielectric material, wherein said extrusion region is configured to initiate a dielectric breakdown in said portion of said dielectric material. 
     
     
         14 . The semiconductor device of  claim 13 , wherein a metal of said extrusion region is electrically disconnected from a metal of said fuse body. 
     
     
         15 . The semiconductor device of  claim 12 , wherein said fuse is provided in a metallization system of said semiconductor device. 
     
     
         16 . The semiconductor device of  claim 13 , wherein at least said fuse body and said extrusion region are formed on a device level of said semiconductor device, wherein said device level comprises high-k metal gate electrode structures. 
     
     
         17 . A method of electrically programming a fuse in a semiconductor device, the method comprising:
 establishing a current flow in a fuse body of said fuse so as to initiate a current-induced metal diffusion; and   reducing a compressive stress in said fuse body that is caused by said current-induced metal diffusion.   
     
     
         18 . The method of  claim 17 , wherein reducing said compressive stress comprises providing a stress buffer region that is in contact with said fuse body and is in a current flow path of said current flow. 
     
     
         19 . The method of  claim 17 , wherein reducing said compressive stress comprises providing a stress buffer region that is in contact with said fuse body and is outside a current flow path of said current flow. 
     
     
         20 . The method of  claim 17 , wherein reducing said compressive stress comprises defining an extrusion portion for removing metal material that diffuses during said current-induced metal diffusion. 
     
     
         21 . The method of  claim 20 , wherein defining an extrusion portion comprises initiating a dielectric breakdown of a dielectric material enclosing said extrusion portion.