US2011180882A1PendingUtilityA1

Semiconductor Device and Method of Fabricating the Same

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Assignee: TOSHIBA KKPriority: Sep 29, 2006Filed: Apr 7, 2011Published: Jul 28, 2011
Est. expirySep 29, 2026(~0.2 yrs left)· nominal 20-yr term from priority
Inventors:Hideki Inokuma
H10D 84/0151H10D 64/021H10D 64/015H10D 84/0149H10D 84/0147H10D 30/792H10D 30/60H10D 84/0128H10D 84/038
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Claims

Abstract

According to an aspect of the invention, there is provided a semiconductor device including a first semiconductor element formed on a semiconductor substrate and using electrons as carriers, and a second semiconductor element formed on the semiconductor substrate and using holes as carriers, a first insulating film and a second insulating film formed on source/drain regions and gate electrodes of the first element and the second element, the first insulating film having tensile stress with respect to the first element, and the second insulating film having compression stress with respect to the second element, and sidewall spacers of the gate electrodes of the first element and the second element, at least portions of the sidewall spacers being removed, wherein at least one of the first insulating film and the second insulating film does not close a spacing between the gate electrodes of the first element and the second element.

Claims

exact text as granted — not AI-modified
1 . A semiconductor device comprising:
 a plurality of first semiconductor elements formed on a semiconductor substrate side by side and using electrons as carriers, and a plurality of second semiconductor elements formed on the semiconductor substrate side by side and using holes as carriers;   a first insulating film and a second insulating film formed on source/drain regions and gate electrodes of the first semiconductor elements and the second semiconductor elements, respectively, the first insulating film having tensile stress with respect to the first semiconductor elements, and the second insulating film having compression stress with respect to the second semiconductor elements; and   sidewall spacers of the gate electrodes of the first semiconductor elements and the second semiconductor elements,   wherein at least one of the first insulating film and the second insulating film does not close a spacing between the gate electrodes of the first semiconductor elements and a spacing between the second semiconductor elements.   
     
     
         2 . The device according to  claim 1 , wherein one of the first insulating film and the second insulating film provided in a form of sidewall spacers of the gate electrode of one of the first semiconductor elements and the second semiconductor elements. 
     
     
         3 . The device according to  claim 1 , wherein film thicknesses of the first insulating film and the second insulating film are 10 to 200 nm. 
     
     
         4 . The device according to  claim 1 , wherein each of the first insulating film and the second insulating film is one film selected from the group consisting of a silicon oxide film, a silicon nitride film, a silicon oxynitride film, a hafnium oxide film, an aluminum oxide film, an aluminum nitride film, a tantalum oxide film, and a titanium oxide film. 
     
     
         5 . The device according to  claim 1 , further comprising dielectric films selectively formed on the semiconductor substrate and connected to undermost portions of the sidewall spacers of the gate electrodes to sandwich the gate electrodes. 
     
     
         6 . The device according to  claim 5 , wherein a film thickness W of the first insulating film, a film thickness X of the stopper film, and a space Y between the gate electrodes satisfy an equation, 2×(W+X)<Y. 
     
     
         7 .- 13 . (canceled)

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