Plasma doping method and method for fabricating semiconductor device using the same

Abstract

A doping method that forms a doped region at a desired location of a three-dimensional (3D) conductive structure, controls the doping depth and doping dose of the doped region relatively easily, has a shallow doping depth, and prevents a floating body effect. A semiconductor device is fabricated using the same doping method. The method includes, forming a conductive structure having a sidewall, exposing a portion of the sidewall of the conductive structure, and forming a doped region in the exposed portion of the sidewall by performing a plasma doping process.

1 . A method for doping a semiconductor device, comprising:
 forming a conductive structure having a sidewall;   exposing a portion of the sidewall of the conductive structure; and   forming a doped region in the exposed portion of the sidewall by performing a plasma doping process.   
     
     
         2 . The method of  claim 1 , further comprising:
 forming a protective layer on a surface of the doped region; and   performing an annealing process to activate the doped region.   
     
     
         3 . The method of  claim 2 , wherein the forming of the protective layer comprises:
 oxidizing the surface of the doped region.   
     
     
         4 . The method of  claim 2 , wherein the annealing process includes a rapid thermal annealing (RTA). 
     
     
         5 . The method of  claim 1 , further comprising:
 forming a protective layer on the surface of the doped region by performing an annealing process for activating the doped region.   
     
     
         6 . The method of  claim 5 , wherein the annealing process is performed in an atmosphere of an oxygen-containing gas. 
     
     
         7 . The method of  claim 5 , wherein the annealing process is performed in an atmosphere of a nitrogen-containing gas. 
     
     
         8 . The method of  claim 1 , wherein the exposing of the portion of the sidewall of the conductive structure comprises:
 forming an anti-doping layer covering the conductive structure; and   forming an opening by selectively removing a portion of the anti-doping layer.   
     
     
         9 . The method of  claim 8 , wherein the anti-doping layer includes an insulation material. 
     
     
         10 . The method of  claim 8 , wherein the anti-doping layer includes at least one selected from the group consisting of an oxide layer, a nitride layer, an undoped polysilicon layer, and a metal nitride layer. 
     
     
         11 . The method of  claim 8 , wherein the opening is formed to open a portion of the sidewall of the conductive structure in a line shape. 
     
     
         12 . The method of  claim 1 , wherein the conductive structure includes line-type active pillars each having a first sidewall and a second sidewall. 
     
     
         13 . The method of  claim 1 , wherein the plasma doping process is performed with a doping energy of lower than approximately 20 KV in a doping dose of approximately 1×10 15  to approximately 1×10 17  atoms/cm 2 . 
     
     
         14 . A method for fabricating a semiconductor device, comprising:
 forming an active region having a sidewall by etching a substrate;   exposing a portion of the sidewall of the active region;   forming a junction in the exposed portion of the sidewall by performing a plasma doping process; and   forming a protective layer on a surface of the junction.   
     
     
         15 . The method of  claim 14 , wherein further comprising:
 performing an annealing process to activate the junction after the forming of the protective layer.   
     
     
         16 . The method of  claim 15 , wherein the annealing process includes a rapid thermal annealing (RTA). 
     
     
         17 . The method of  claim 14 , wherein the forming of the protective layer comprises:
 oxidizing the surface of the junction.   
     
     
         18 . The method of  claim 14 , wherein the forming of the protective layer is performed while an annealing process for activating the junction is performed simultaneously. 
     
     
         19 . The method of  claim 18 , wherein the annealing process is performed in an atmosphere of an oxygen-containing gas. 
     
     
         20 . The method of  claim 18 , wherein the annealing process is performed in an atmosphere of a nitrogen-containing gas. 
     
     
         21 . The method of  claim 14 , wherein the plasma doping is performed with a doping energy of lower than approximately 20 KV in a doping dose of approximately 1×10 15  to approximately 1×10 17  atoms/cm 2 . 
     
     
         22 . The method of  claim 14 , wherein the exposing of the portion of the sidewall of the active region comprises:
 forming an anti-doping layer covering the active region; and   forming an opening by selectively removing a portion of the anti-doping layer.   
     
     
         23 . The method of  claim 22 , wherein the anti-doping layer includes an insulation material. 
     
     
         24 . The method of  claim 22 , wherein the anti-doping layer includes at least one selected from the group consisting of an oxide layer, a nitride layer, an undoped polysilicon layer, and a metal nitride layer. 
     
     
         25 . The method of  claim 22 , wherein the opening is formed to open a portion of the sidewall of the active region in a line shape. 
     
     
         26 . The method of  claim 14 , wherein the active region includes line-type silicon pillars each having a first sidewall and a second sidewall. 
     
     
         27 . The method of  claim 14 , further comprising:
 removing the protective layer;   forming a side contact coupled to the junction; and   forming a buried bit line electrically coupled to the junction through the side contact.   
     
     
         28 . A method for fabricating a semiconductor device, comprising:
 forming a conductive structure having a sidewall by etching a substrate with a hard mask pattern used as an etch barrier;   forming a liner layer covering the conductive structure;   forming a first anti-doping layer filling a portion of a gap between the conductive structure and a second anti-doping layer covering a first sidewall of the conductive structure over the liner layer;   forming a contact region exposing a portion of a second sidewall of the conductive structure by removing the liner layer and a portion of the first anti-doping layer formed over the second sidewall;   forming a junction in the contact region by performing a plasma doping process;   removing the second anti-doping layer;   forming a protective layer on a surface of the junction; and   removing the first anti-doping layer.