US2011198729A1PendingUtilityA1

Methods and Compositions for Preparing Tensile Strained Ge on Ge1-ySNy Buffered Semiconductor Substrates

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Assignee: UNIV ARIZONAPriority: Jun 4, 2007Filed: Feb 23, 2011Published: Aug 18, 2011
Est. expiryJun 4, 2027(~0.9 yrs left)· nominal 20-yr term from priority
H10P 14/3254H10P 14/3212H10P 14/3211H10P 14/2905H10P 14/24H10P 14/22H10P 14/3411
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Claims

Abstract

The present disclosure describes methods for preparing semiconductor structures, comprising forming a Ge 1-y Sn y buffer layer on a semiconductor substrate and forming a tensile strained Ge layer on the Ge 1-y Sn y buffer layer using an admixture of (GeH 3 ) 2 CH 2 and Ge 2 H 6 in a ratio of between 1:10 and 1:30. The disclosure further provides semiconductor structures having highly strained Ge epilayers (e.g., between about 0.15% and 0.45%) as well as compositions comprising an admixture of (GeH 3 ) 2 CH 2 and Ge 2 H 6 in a ratio of between about 1:10 and 1:30. The methods herein provide, and the semiconductor structure provide, Ge epilayers having high strain levels which can be useful in semiconductor devices for example, in optical fiber communications devices.

Claims

exact text as granted — not AI-modified
1 . A semiconductor structure produced by a method comprising:
 a) forming a Ge 1-y Sn y  buffer layer on a semiconductor substrate; and   b) forming a tensile strained Ge layer on the Ge 1-y Sn y  buffer layer using an admixture of (GeH 3 ) 2 CH 2  and Ge 2 H 6  in a ration of between 1:10 and 1:30.   
     
     
         2 . A semiconductor structure comprising:
 a semiconductor substrate,   a Ge 1-y Sn y  buffer layer formed over the substrate, and   a tensile strained Ge layer formed over the Ge 1-y Sn y  buffer layer.   
     
     
         3 . The semiconductor structure of  claim 2 , wherein the tensile strained Ge layer has an essentially atomically flat surface. 
     
     
         4 . The semiconductor structure of  claim 2 , wherein the substrate comprises silicon. 
     
     
         5 . The semiconductor structure of  claim 2 , wherein y is between 0.015-0.045. 
     
     
         6 . The semiconductor structure of  claim 2 , wherein the Ge 1-y Sn y  buffer layer is at least 95% relaxed. 
     
     
         7 . The semiconductor structure of  claim 2 , wherein the symmetry of the tensile Ge layer is tetragonal. 
     
     
         8 . The semiconductor structure of  claim 2 , wherein the Ge layer has a tunable tensile strain of between 0.15% and 0.45% 
     
     
         9 . The semiconductor structure of  claim 2 , wherein the Ge layer is formed directly on the Ge 1-y Sn y  buffer layer.

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