Semiconductor Device and Method of Manufacturing the Same

Abstract

The semiconductor device which has a memory cell including the TMR film with which memory accuracy does not deteriorate, and its manufacturing method are obtained. A TMR element (a TMR film, a TMR upper electrode) is selectively formed in the region which corresponds in plan view on a TMR lower electrode in a part of formation area of a digit line. A TMR upper electrode is formed by 30-100 nm thickness of Ta, and functions also as a hard mask at the time of a manufacturing process. The interlayer insulation film formed from LT-SiN on the whole surface of a TMR element and the upper surface of a TMR lower electrode is formed, and the interlayer insulation film which covers the whole surface comprising the side surface of a TMR lower electrode, and includes LT-SiN is formed. The interlayer insulation film which covers the whole surface and includes SiO 2 is formed.

1 . A semiconductor device, comprising:
 a first interlayer insulation film formed above a semiconductor substrate;   a lower layer wiring formed selectively to penetrate the first interlayer insulation film; and   a second interlayer insulation film formed over the first interlayer insulation film including the lower layer wiring and having a via hole exposing a upper surface of the lower layer wiring;   a lower electrode formed over the second interlayer insulation film and electrically connected with the lower layer wiring via the via hole;   a TMR element formed selectively over a portion of the lower electrode, and including a laminated structure of a TMR film and an upper electrode; and   an insulating film formed over the lower electrode and the TMR element,   wherein both the insulating film and the lower electrode have a side surface over the second interlayer insulation film in a uniform direction, and a side surface of the lower electrode is depressed from the insulating film;   and further comprising an end portion oxidization region adjoining a side surface of the lower electrode.   
     
     
         2 . A semiconductor device according to  claim 1 , wherein
 the insulating film includes a low-temperature insulation film formed at a low temperature less than or equal to 300° C.   
     
     
         3 . A semiconductor device according to  claim 1 , wherein
 the insulating film is formed over a whole surface over the lower electrode over the second interlayer insulation film.   
     
     
         4 . A semiconductor device according to  claim 1 , wherein
 the semiconductor device has a first TMR formation area and a second TMR formation area; and   the TMR element, the lower electrode, and the insulating film are formed in each of the first and second TMR formation areas; and   further comprising a third interlayer insulation film formed over the insulation film in the first and second TMR formation areas;   wherein the third interlayer insulation film is in contact with the second interlayer insulation film between the first and second TMR formation areas to separate the lower electrodes and the insulating films in the first and the second TMR formation areas; and   the second and third interlayer insulation films are formed of material having the same chemical species.   
     
     
         5 . A semiconductor device according to  claim 4 , wherein
 the second and third interlayer insulation films are formed by the same manufacturing process.   
     
     
         6 . A semiconductor device according to  claim 5 , wherein
 the second and third interlayer insulation films are formed in an interface and its neighborhood by a low-temperature insulation film formed at a low temperature less than 300° C.   
     
     
         7 . A semiconductor device according to  claim 1 , wherein
 the lower electrode includes a metallic material with a high melting point, and whose oxide has insulation.   
     
     
         8 . A method of manufacturing a semiconductor device, comprising the steps of:
 (a) forming a first interlayer insulation film above a semiconductor substrate;   (b) forming a lower layer wiring selectively, penetrating the first interlayer insulation film;   (c) forming a second interlayer insulation film over the first interlayer insulation film including the lower layer wiring; and   (d) forming a via hole, penetrating the second interlayer insulation film over the lower layer wiring;   (e) forming a lower electrode over the first interlayer insulation film,   wherein the lower electrode is electrically connected with the lower layer wiring via the via hole; and further comprising the steps of:   (f) forming selectively a TMR element used as a laminated structure of a TMR film and an upper electrode over the lower electrode over the second interlayer insulation film;   (g) forming an insulating film over the lower electrode;   (h) forming a resist patterned over the insulating film;   (i) etching the lower electrode and the insulating film by using the resist as a mask, and patterning the lower electrode and the insulating film; and   (j) removing the resist,   wherein the step (j) includes ashing treatment, and by oxidizing in part from a side surface of the lower electrode by the ashing treatment, an end portion oxidization region is formed.   
     
     
         9 . A method of manufacturing a semiconductor device according to  claim 8 , wherein
 the insulating film includes a low-temperature insulation film; and   the step (g) includes a step which forms the insulating film at a low temperature less than or equal to 300° C.   
     
     
         10 . A method of manufacturing a semiconductor device according to  claim 8 , wherein
 the step (j) includes a wet cleaning treatment.   
     
     
         11 . A method of manufacturing a semiconductor device according to  claim 8 , wherein
 the semiconductor device has a first TMR formation area and a second TMR formation area;   the TMR element includes a first TMR element and a second TMR element formed in the first TMR formation area and second TMR formation area, respectively;   the insulating film includes a first insulation film and a second insulation film formed in the first and second TMR formation areas, respectively, and each of the first and second insulation films has a side surface, the side surfaces are separated by a prescribed interval and mutually face each other after the step (i) execution; and   the lower electrode includes a first lower electrode and a second lower electrode formed in the first and second TMR formation areas, and each of the first and second lower electrodes has a side surface, the side surfaces are separated by the prescribed interval and mutually face each other after the step (i) execution.   
     
     
         12 . A method of manufacturing a semiconductor device according to  claim 8 , wherein
 the semiconductor device includes an element formation region in which the TMR element is formed, and a peripheral region in which the TMR element is not formed;   the second interlayer insulation film includes a first partial interlayer insulation film, and a second partial interlayer insulation film formed over the first partial interlayer insulation film; and   the insulating film is formed with material with comparable thickness and the same chemical species as the second partial interlayer insulation film; and further comprising the steps of:   (k) forming a third interlayer insulation film all over performing after the step (j) and including the element formation region and the peripheral region;   (l) forming a partial via hole for periphery which penetrates the third interlayer insulation film and the second partial interlayer insulation film in the peripheral region at the same time of forming a partial via hole for TMR which penetrates the third interlayer insulation film in the element formation region; and   (m) forming a via hole for periphery which makes the first partial interlayer insulation film penetrate from the partial via hole for periphery in the peripheral region while making the insulating film penetrate furthermore from the partial via hole for TMR and forming the via hole for TMR in the element formation region; wherein   the third interlayer insulation film is formed with a material with which the insulating film, and the second partial interlayer insulation film differ from chemical species, and are formed with the same material as the second partial interlayer insulation film in chemical species.