Low-cost solar cells and methods for their production

Abstract

Methods for fabricating solar cells without the need to perform gasification of metallurgical-grade silicon are disclosed. Consequently, the costs and health and environmental hazards involved in fabricating the solar or silicon grade silicon are being avoided. A solar cell structure comprises a metallurgical grade doped silicon substrate and a thin-film structure formed over the substrate to form a p-i-n junction with the substrate. The substrate may be doped p-type, and the thin film structure may be an intrinsic amorphous layer formed over the substrate and an n-type amorphous layer formed over the intrinsic layer.

1 . A method for fabricating solar cells, comprising:
 obtaining multi-crystalline silicon wafers consisting essentially of a metallurgical grade silicon of impurity of 99.9%-99.999% doped as one of a p-type or n-type;   texturing front surface of the wafers;   depositing an intrinsic layer directly over and in contact with the front surface of the wafers;   depositing a doped layer of opposite polarity of the wafers over and in direct contact with the intrinsic layer;   forming a top conductive contact above the doped layer;   forming a bottom conductive contact on the underside of the wafers.   
     
     
         2 . The method of  claim 1 , wherein at least one of forming the intrinsic layer and forming the doped layer comprises forming an amorphous layer. 
     
     
         3 . The method of  claim 1 , wherein at least one of forming the intrinsic layer and forming the doped layer comprises forming a hydrogenated layer. 
     
     
         4 . The method of  claim 1 , wherein forming the bottom conductive contact comprises forming a doped conductive layer of same polarity as the wafers over the underside of the wafers and forming a metal layer over the doped conductive layer. 
     
     
         5 . The method of  claim 1 , wherein forming the top conductive contact comprises forming a transparent conductor over the doped layer. 
     
     
         6 . The method of  claim 4 , further comprising forming an amorphous intrinsic layer between the underside of the wafers and the doped conductive layer. 
     
     
         7 . The method of  claim 4 , wherein forming a metal layer comprises sputtering an aluminum layer. 
     
     
         8 . The method of  claim 1 , wherein the wafers are p-type and the doped layer is n-type. 
     
     
         9 . The method of  claim 8 , forming a transparent conductor comprises forming an indium-tin-oxide (ITO) layer. 
     
     
         10 . The method of  claim 9 , further comprising fabricating top electrodes over the ITO. 
     
     
         11 . The method of  claim 10 , wherein fabricating top electrodes comprises silk-screening silver paste. 
     
     
         12 . The method of  claim 1 , wherein texturing front surface comprises etching the front surface. 
     
     
         13 . The method of  claim 1 , wherein wafer are p-type with resistivity in the range 0.1-1 ohmcm. 
     
     
         14 . The method of  claim 1 , wherein forming the intrinsic layer comprises processing the wafers in plasma enhanced chemical vapor deposition (PECVD) chamber and maintaining plasma using silane gas (SiH4) mixed with hydrogen gas (H2). 
     
     
         15 . The method of  claim 1 , wherein forming the doped layer comprises processing the wafers in a plasma enhanced chemical vapor deposition (PECVD) chamber and maintaining plasma using silane, hydrogen, and phosphine gas (PH3). 
     
     
         16 . The method of  claim 4 , wherein forming the doped conductive layer comprises processing the wafers in a plasma enhanced chemical vapor deposition (PECVD) chamber and maintaining plasma using silane, hydrogen, and diborane gas (B2H6). 
     
     
         17 . The method of  claim 1 , wherein:
 forming the intrinsic layer comprises forming an amorphous hydrogenated layer intrinsic layer;   forming the doped layer comprise forming an amorphous hydrogenated n-type layer;   forming the bottom conductive contact comprises forming a p-type layer over the underside of the wafers and forming a metal layer over the doped conductive layer; and   forming the top conductive contact comprises forming a transparent conductor layer over the doped layer and forming top electrodes over the transparent conductor layer.   
     
     
         18 . The method of  claim 17 , wherein fabricating top electrodes comprises silk-screening silver paste. 
     
     
         19 . The method of  claim 17 , wherein forming a metal layer comprises sputtering an aluminum layer. 
     
     
         20 . The method of  claim 17 , wherein texturing front surface comprises etching the front surface.