Dual Mode Floating Point Multiply Accumulate Unit

Abstract

Disclosed are various embodiments of a stream processing unit for single instruction multiple data (SIMD) processing, wherein the stream processing unit executes a stage of a Multiply-Accumulate calculation. In one embodiment, the stream processing unit comprises a plurality of scalar arithmetic logic units (ALUs) configured to receive data having a plurality of data types. The number and type of scalar ALUs corresponds to an SIMD factor. In one embodiment, the scalar ALUs are executed sequentially with a delay being introduced in between execution of each of the scalar ALUs, wherein the delay corresponds to the SIMD factor.

1 . A stream processing unit for single instruction multiple data (SIMD) processing, the stream processing unit comprising:
 a plurality of scalar arithmetic logic units (ALUs) for executing a stage of a Multiply-Accumulate calculation, the number of scalar ALUs in the plurality of scalar ALUs corresponding to an SIMD factor;   each of the scalar ALUs in the plurality of scalar ALUs being configured to conform to the SIMD factor, wherein each of the scalar ALUs is further configured to execute instructions using data having a plurality of data types;   a delay in execution of a portion of the plurality of scalar ALUs; and   a control unit that controls a direction of a calculated result from each of the scalar ALUs.   
     
     
         2 . The stream processing unit of  claim 1 , wherein the scalar arithmetic logic unit comprising a mantissa datapath configured to facilitate processing of a plurality of data types. 
     
     
         3 . The stream processing unit of  claim 1 , wherein the scalar arithmetic logic unit comprising a short format exponent datapath configured to facilitate processing of a first set of short format data. 
     
     
         4 . The stream processing unit of  claim 1 , wherein the SIMD factor corresponds to the data type. 
     
     
         5 . The stream processing unit of  claim 1 , wherein the scalar arithmetic logic unit comprising a long format exponent datapath configured to facilitate processing of long format data. 
     
     
         6 . The stream processing unit of  claim 1 , wherein the scalar arithmetic logic unit comprising a mixed format exponent datapath configured to facilitate processing of a second set of short format data and long format data. 
     
     
         7 . The stream processing unit of  claim 1 , wherein execution of each of the scalar ALUs begins sequentially after the corresponding delay. 
     
     
         8 . The stream processing unit of  claim 1 , wherein a first scalar ALU is executed without the delay to generate a first calculated result. 
     
     
         9 . The stream processing unit of  claim 1 , wherein a second scalar ALU receives the first calculated result and is executed after the delay to generate a second calculated result. 
     
     
         10 . The stream processing unit of  claim 1 , wherein the control unit directs the calculated result from each of the scalar ALUs to a next scalar ALU in the sequence. 
     
     
         11 . A method for single instruction multiple data (SIMD) processing comprising:
 receiving, in a stream processing unit, data being of a plurality of data types;   executing, in the stream processing unit, a stage of a Multiply-Accumulate calculation using a plurality of scalar arithmetic logic units (ALUs);   executing, in the stream processing unit, each of the scalar ALUs sequentially to generate a calculated result for each of the scalar ALUs, wherein a delay is introduced in between executing each of the scalar ALUs; and   directing, in the stream processing unit, the calculated result from each of the scalar ALUs with a control unit.   
     
     
         12 . The method of  claim 11 , further comprising facilitating processing of a plurality of data types with a mantissa datapath. 
     
     
         13 . The method of  claim 11 , further comprising facilitating processing of a first set of short format data with a short format exponent datapath. 
     
     
         14 . The method of  claim 11 , further comprising facilitating processing of long format data with long format exponent datapath. 
     
     
         15 . The method of  claim 11 , further comprising facilitating processing of a second set of short format data and long format data with a mixed format exponent datapath. 
     
     
         16 . The method of  claim 11 , wherein the number of scalar ALUs in the plurality of scalar ALUs corresponds to an SIMD factor. 
     
     
         17 . The method of  claim 16 , wherein the SIMD factor corresponds to the data type. 
     
     
         18 . The method of  claim 11 , wherein a first scalar ALU is executed without a delay to generate a first calculated result. 
     
     
         19 . The method of  claim 11 , wherein a second scalar ALU receives the first calculated result and is executed after a delay to generate a second calculated result. 
     
     
         20 . The method of  claim 11 , wherein the control unit directs the calculated result from each of the scalar ALUs to a next scalar ALU in the sequence.