US2011214125A1PendingUtilityA1

Task management control apparatus and method having redundant processing comparison

Assignee: BANDO AKIRAPriority: Jun 10, 2005Filed: May 11, 2011Published: Sep 1, 2011
Est. expiryJun 10, 2025(expired)· nominal 20-yr term from priority
G06F 2201/845G06F 11/1695G06F 11/1641G06F 11/1687G06F 11/1683G06F 9/30189G06F 11/165G06F 9/30181G06F 9/3885
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Claims

Abstract

An input/output control apparatus including: a unit that controls input/output of data relating to a computation of a plurality of processors in response to an access request from a second input/output unit and an access request from a first input/output unit which requires higher reliability than said second input/output unit, and orders at least one of a plurality of processors to perform a computation relating to the access request from said first input/output unit away from the computation relating to the access request from said second input/output unit in case of that said first input/output unit issued an access request, so that a same computation is made by said plurality of processors; a unit that compares the results of said computations relative to the access request from said first input/output unit provided from said plurality of processors; and a unit that allows the data associated with said computations of said processors to be output on the basis of said compared results.

Claims

exact text as granted — not AI-modified
1 . An input/output control apparatus comprising:
 a unit that controls input/output of data relating to a computation of a plurality of processors in response to an access request from a second input/output unit and an access request from a first input/output unit which requires higher reliability than said second input/output unit, and orders at least one of a plurality of processors to perform a computation relating to the access request from said first input/output unit away from the computation relating to the access request from said second input/output unit in case of that said first input/output unit issued an access request, so that a same computation is made by said plurality of processors;   a unit that compares the results of said computations relative to the access request from said first input/output unit provided from said plurality of processors; and   a unit that allows the data associated with said computations of said processors to be output on the basis of said compared results.   
     
     
         2 . The input/output control apparatus according to  claim 1 , wherein
 the computation relating to the access request from said first input/output unit is a relatively high reliability computation, and   the computation relating to the access request from said second input/output unit is a relatively low reliability computation, and said plurality of processors process different computations in the relatively low reliability computation,   said apparatus further comprising a unit that produces results of different computations made by said plurality of processors.   
     
     
         3 . The input/output control apparatus according to  claim 2 , wherein the request for said relatively high reliability computation is an interrupt process that breaks from one of said plurality of processors into another one of said plurality of processors. 
     
     
         4 . The input/output control apparatus according to  claim 2 , wherein said relatively high reliability computation is made for the case of access to an I/O corresponding to the request for said relatively high computation. 
     
     
         5 . The input/output control apparatus according to  claim 4 , wherein said access to said I/O corresponding to said request for said relatively high reliability computation is judged on the basis of an address for said access. 
     
     
         6 . The input/output control apparatus according to  claim 5 , wherein each of said plurality of processors has a request register and a factor register, and said request for said relatively high reliability computation is judged on the basis of the contents written in said request register and said factor register. 
     
     
         7 . The input/output control apparatus according to  claim 6 , wherein a bus wait control signal is produced in response to a bus start signal from one of said plurality of processors to control said one of said processors to wait for bus, thereby limiting said access. 
     
     
         8 . The input/output control apparatus according to  claim 2 , wherein said unit that allows data to be output allows the data to be output in case the computation results from said plurality of processors coincide with each other. 
     
     
         9 . The input/output control apparatus according to  claim 8 , wherein said different computations are made in case a signal that commands to execute is generated after said coincidence. 
     
     
         10 . The input/output control apparatus according to  claim 1 , wherein
 the computation relating to the access request from said first input/output unit is a relatively high reliability computation, and   the computation relating to the access request from said second input/output unit is a relatively low reliability computation,   when said relatively high reliability computation is requested, a signal is generated to order said at least one processor to suspend its computation.   
     
     
         11 . The input/output control apparatus according to  claim 10 , further comprising a unit that limits the interruption of said plurality of processors not to make said relatively low reliability computation in case said relatively high reliability computation is being executed. 
     
     
         12 . The input/output control apparatus according to  claim 11 , further comprising a unit that judges to be abnormal in case at least one of said plurality of processors does not produce said computation result for a predetermine time. 
     
     
         13 . An information control apparatus comprising:
 a plurality of processors;   a unit that controls input/output of data relating to a computation of said plurality of processors in response to an access request from a second input/output unit and an access request from a first input/output unit which requires higher reliability than said second input/output unit, and orders at least one of a plurality of processors to perform a computation relating to the access request from said first input/output unit away from the computation relating to the access request from said second input/output unit in case of that said first input/output unit issued an access request, so that a same computation is made by said plurality of processors;   a unit that compares the results of said computations relative to the access request from said first input/output unit provided from said plurality of processors; and   a unit that allows the data associated with said computations of said processors to be output on the basis of said compared results.   
     
     
         14 . An information controlling method comprising the steps of:
 when an input/output control apparatus controls input/output of data relating to a computation of a plurality of processors in response to an access request from a second input/output unit and an access request from a first input/output unit which requires higher reliability than said second input/output unit,   ordering at least one of a plurality of processors to perform a relatively high reliability computation away from a relatively low reliability computation in case of that said first input/output unit issued an access request, so that a same computation is made by said plurality of processors;   in said plurality of processors, making a transition from the computation relating to said access request from said second input/output unit to the computation relating to said access request form said first input/output unit in response to a command from said input/output control apparatus;   comparing the computed results from said plurality of processors by said input/output control apparatus; and   allowing the output associated with the computations made by said processors to be supplied on the basis of said compared results by said input/output control apparatus.

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