Balanced adaptive body bias control

Abstract

Systems and methods of balanced adaptive body bias control. In accordance with a first embodiment of the present invention, a method of balanced adaptive body bias control comprises determining a desirable dynamic condition for circuitry of an integrated circuit. A first dynamic indicator corresponding to the desirable dynamic condition is accessed. Second and third dynamic indicators of the integrated circuit are accessed. A first body biasing voltage is adjusted by an increment so as to change the first dynamic indicator in the direction of the desirable dynamic condition. A second body biasing voltage is adjusted based on a relationship between the second dynamic indicator and the third dynamic indicator.

1 . An integrated circuit including:
 a body bias distribution network comprising deep wells coupled to a plurality of bodies of transistors of said integrated circuit.   
     
     
         2 . The integrated circuit of  claim 1  further comprising a non-volatile storage for storing a representation of a body bias voltage. 
     
     
         3 . The integrated circuit of  claim 2  wherein said representation of a body bias voltage is stored in a digital format. 
     
     
         4 . The integrated circuit of  claim 2  wherein said representation of a body bias voltage is stored in an analog format. 
     
     
         5 . The integrated circuit of  claim 1  further comprising a body bias voltage source for generating a body bias voltage. 
     
     
         6 . The integrated circuit of  claim 1  further comprising an electrical contact for coupling a body bias voltage to said body bias distribution network from an external source. 
     
     
         7 . The integrated circuit of  claim 1  further configured such that application of a body bias voltage, via said body bias distribution network, to an integrated transistor corrects a difference between a nominal threshold voltage and a desired threshold voltage of said integrated transistor. 
     
     
         8 . An integrated circuit comprising:
 a variable voltage source for generating a body bias voltage;   a body bias voltage distribution network for coupling said variable voltage source to a plurality of transistor bodies of said integrated circuit; and   a processor for commanding said variable voltage source to generate said body bias voltage.   
     
     
         9 . The integrated circuit of  claim 8  further comprising a non-volatile storage for storing a representation of said body bias voltage. 
     
     
         10 . The integrated circuit of  claim 9  wherein said processor is further for accessing said representation of said body bias voltage. 
     
     
         11 . The integrated circuit of  claim 10  wherein said variable voltage source is commanded to generate said body bias voltage corresponding to said representation of said body bias voltage. 
     
     
         12 . The integrated circuit of  claim 8  further configured such that application of said body bias voltage to an integrated transistor corrects a difference between a nominal threshold voltage and a desired threshold voltage of said integrated transistor. 
     
     
         13 . The integrated circuit of  claim 12  wherein said transistor is a component of said processor. 
     
     
         14 . The integrated circuit of  claim 8  wherein said body bias voltage distribution network comprises deep well structures. 
     
     
         15 . An integrated circuit comprising:
 a substrate;   a non-volatile storage for storing a representation of a body bias voltage;   a variable voltage source for generating said body bias voltage; and   a body bias voltage distribution network,   wherein said body bias voltage distribution network is not configured to apply said body biasing voltage to said substrate.   
     
     
         16 . The integrated circuit of  claim 15  wherein said variable voltage source is configured to generate said body bias voltage corresponding to said representation of a body bias voltage. 
     
     
         17 . The integrated circuit of  claim 15  wherein said representation of a body bias voltage is stored in a digital format. 
     
     
         18 . The integrated circuit of  claim 15  wherein said representation of a body bias voltage is stored in an analog format. 
     
     
         19 . The integrated circuit of  claim 15  further configured such that application of said body bias voltage to an integrated transistor corrects a difference between a nominal threshold voltage and a desired threshold voltage of said integrated transistor. 
     
     
         20 . The integrated circuit of  claim 15  wherein said body bias voltage distribution network comprises deep well structures.