Semiconductor device and method for manufacturing a semiconductor device

Abstract

A semiconductor device includes a semiconductor chip including a first conducting element, and a second conducting element arranged outside the semiconductor chip and electrically connected to the first conducting element at a first location. It further includes a third conducting element arranged outside the semiconductor chip and electrically connected to the first conducting element at a second location, and a fourth conducting element arranged outside the semiconductor chip. An encapsulating body encapsulates the semiconductor chip. A vertical projection of the fourth conducting element on the chip crosses the first conducting element between the first location and the second location. At least one of the second conducting element, third conducting element, and fourth conducting element extend over the semiconductor chip and the encapsulating body.

1 . A semiconductor device comprising:
 a semiconductor chip comprising a first conducting element;   a second conducting element arranged outside the semiconductor chip and electrically connected to the first conducting element at a first location; and   a third conducting element arranged outside the semiconductor chip and electrically connected to the first conducting element at a second location; and   a fourth conducting element arranged outside the semiconductor chip;   an encapsulating body encapsulating the semiconductor chip,   wherein a vertical projection of the fourth conducting element on the chip crosses the first conducting element between the first location and the second location, and   wherein at least one of the second conducting element, third conducting element and fourth conducting element extend over the semiconductor chip and the encapsulating body.   
     
     
         2 . The semiconductor device according to  claim 1 , further comprising an insulating layer arranged between the first conducting element and at least one of the second conducting element, third conducting element and fourth conducting element. 
     
     
         3 . The semiconductor device according to  claim 1 , wherein the second conducting element, third conducting element and fourth conducting element are formed from a common conducting layer. 
     
     
         4 . The semiconductor device according to  claim 1 , further comprising external connection elements electrically connected to at least one of the second conducting element, third conducting element and fourth conducting element. 
     
     
         5 . The semiconductor device according to  claim 4 , wherein the external connection elements are solder bumps. 
     
     
         6 . The semiconductor device according to  claim 4 , wherein the external connection elements are located at positions defining an array. 
     
     
         7 . The semiconductor device according to  claim 1 , wherein at least one of the first, second, third and fourth conducting elements comprise a metal. 
     
     
         8 . The semiconductor device according to  claim 1 , wherein at least one of the first, second, third and fourth conducting elements are a part of a coil. 
     
     
         9 . A semiconductor device, comprising:
 a semiconductor chip comprising at least two contact elements and a first conducting element located in the chip,   a layer of conducting elements arranged adjacent the chip, comprising a contact region providing an interface to the outside of the semiconductor device, and second and third conducting elements, and   a mold material covering a backside and side faces of the semiconductor chip, wherein a part of the layer of conducting elements projects vertically on the mold material covering the side faces of the chip,   wherein the second conducting element and the third conducting element are connected to the first conducting element located in the chip via contact elements, so that the second and third conducting elements are electrically connected via the first conducting element, and the second conducting element is connected to the contact region.   
     
     
         10 . The semiconductor device according to  claim 9 , wherein a vertical projection of the first conducting element located in the chip on the layer of conducting elements crosses a fourth conducting element of the layer of conducting elements. 
     
     
         11 . The semiconductor device according to  claim 9 , further comprising a first dielectric layer arranged between the semiconductor chip and the layer of conducting elements. 
     
     
         12 . The semiconductor device according to  claim 11 , further comprising a second dielectric layer arranged on a side of the layer of conducting elements opposite the first dielectric layer. 
     
     
         13 . The semiconductor device according to  claim 9 , wherein the contact region of the layer of conducting elements comprises a solder ball. 
     
     
         14 . The semiconductor device according to  claim 9 , wherein the layer of conducting elements comprises a metal. 
     
     
         15 . A method of manufacturing semiconductor devices, comprising:
 providing at least two semiconductor chips that each comprise a first conduction line;   covering the at least two semiconductor chips with mold material;   applying a metallization layer over the at least two semiconductor chips and the mold material such that the metallization layer contacts each of the first conduction lines at least two separated locations,   wherein at least a part of the metallization layer extends over the at least two semiconductor chips and the mold material; and   separating the at least two semiconductor chips from each other after the application of the metallization layer.   
     
     
         16 . The method according to  claim 15 , wherein the semiconductor chips are diced semiconductor chips. 
     
     
         17 . The method according to  claim 15 , wherein a first dielectric layer is applied on at least one of the semiconductor chips before applying the metallization layer, and contact holes are subsequently formed in the first dielectric layer. 
     
     
         18 . The method according to  claim 15 , wherein a second dielectric layer is applied after application of the metallization layer, and wherein contact holes are subsequently formed in the second dielectric layer. 
     
     
         19 . The method according to  claim 15 , wherein the metallization layer is etched using a mask so as to produce at least one conduction line. 
     
     
         20 . A method of manufacturing semiconductor devices, comprising:
 providing a semiconductor chip having a first conducting element, which is connected to two contact elements on a face of the chip; and   providing an encapsulating body, which encapsulates the semiconductor chip, and   providing a layer of conducting elements on one side of the chip, wherein the layer of conducting elements at least partially extends over the semiconductor chip and the encapsulating body,   wherein a second conducting element and a third conducting element of the layer of conducting elements are connected to the first conducting element located in the chip via contact elements, so that the second and third conducting elements are electrically connected via the first conducting element, and a vertical projection of a fourth conducting element of the layer of conducting elements crosses the first conducting element.   
     
     
         21 . The method of  claim 20 , wherein the layer of conducting elements is part of a substrate. 
     
     
         22 . The method of  claim 20 , wherein the layer of conducting elements is part of a printed circuit board.