X-Ray and Gamma Ray Detector Readout Sytem

Abstract

A readout electronics scheme is under development for high resolution, compact PET (positron emission tomography) imagers based on LSO (lutetium ortho-oxysilicate, Lu 2 SiO 5 ) scintillator and avalanche photodiode (APD) arrays. The key is to obtain sufficient timing and energy resolution at a low power level, less than about 30 mW per channel, including all required functions. To this end, a simple leading edge level crossing discriminator is used, in combination with a transimpedance preamplifier. The APD used has a gain of order 1,000, and an output noise current of several pA/√Hz, allowing bipolar technology to be used instead of CMOS, for increased speed and power efficiency. A prototype of the preamplifier and discriminator has been constructed, achieving timing resolution of 1.5 ns FWHM, 2.7 ns full width at one tenth maximum, relative to an LSO/PMT detector, and an energy resolution of 13.6% FWHM at 511 keV, while operating at a power level of 22 mW per channel. Work is in progress towards integration of this preamplifier and discriminator with appropriate coincidence logic and amplitude measurement circuits in an ASIC suitable for a high resolution compact PET instrument. The detector system and/or ASIC can also be used for many other applications for medical to industrial imaging.

1 . A method of processing at least one signal with an integrated circuit, comprising:
 receiving an input signal at an input of a channel;   connecting an amplifier to said channel input to amplify said input signal;   producing a peak of said amplified input signal;   generating an arrival time signal from said amplified input signal;   producing a coincidence information from said arrival time signal.   outputting said peak;   outputting said arrival time signal; and   controlling said integrated circuit and communicating with external circuits.   
     
     
         2 . The method of  claim 1 , further comprising coupling a shaping amplifier to said amplifier. 
     
     
         3 . The method of  claim 2 , further comprising coupling a comparator to said amplifier. 
     
     
         4 . The method of  claim 3 , further comprising adjusting a threshold of said comparator. 
     
     
         5 . The method of  claim 1 , further comprising adjusting a gain of said amplifier. 
     
     
         6 . The method of  claim 1 , further comprising adjusting an offset of said amplifier. 
     
     
         7 . The method of  claim 1 , further comprising selecting a shaping time of said amplifier. 
     
     
         8 . The method of  claim 1 , wherein said amplifier is self resetting. 
     
     
         9 . The method of  claim 1 , further comprising outputting an address of said channel. 
     
     
         10 . The method of  claim 1 , further comprising detecting an event in coincidence with another event. 
     
     
         11 . The method of  claim 1 , further comprising measuring said peak. 
     
     
         12 . The method of  claim 1 , further comprising multiplexing said output. 
     
     
         13 . An integrated circuit for processing at least one signal, comprising:
 a plurality of channels with an input that receives said signal;   an amplifier connected to said input to amplify said signal;   a peak hold circuit to produce a peak of said amplified signal;   a time measurement circuit to determine an arrival time of said amplified signal;   a coincidence circuit to determine a coincidence information from said arrival time signal.   an output circuit to output said peak and said arrival time signal; and   a control circuit to control said integrated circuit.   
     
     
         14 . The method of  claim 13 , further comprising connecting a shaping amplifier to said amplifier. 
     
     
         15 . The method of  claim 14 , further comprising connecting a comparator to said amplifier. 
     
     
         16 . The method of  claim 15 , further comprising adjusting a threshold of said comparator. 
     
     
         17 . The method of  claim 13 , further comprising adjusting a gain of said amplifier. 
     
     
         18 . The method of  claim 13 , further comprising adjusting an offset of said amplifier. 
     
     
         19 . The method of  claim 14 , further comprising selecting a shaping time of said amplifier. 
     
     
         20 . The method of  claim 13 , wherein said amplifier is self resetting. 
     
     
         21 . The method of  claim 13 , further comprising outputting an address of one of said plurality of channels. 
     
     
         22 . The method of  claim 13 , further comprising detecting an event in coincidence with another event. 
     
     
         23 . The method of  claim 13 , further comprising measuring said peak. 
     
     
         24 . The method of  claim 13 , further comprising multiplexing said output.