Semiconductor Device with Circuit for Reduced Parasitic Inductance

Abstract

Parasitic inductance of the main circuit of a power source unit is reduced. In a non-insulated DC-DC converter having a circuit in which a power MOSFET for high side switch and a power MOSFET for low side switch are connected in series, the power MOSFET for high side switch and the power MOSFET for low side switch are formed of n-channel vertical MOSFETs, and a source electrode of the power MOSFET for high side switch and a drain electrode of the power MOSFET for low side switch are electrically connected via the same die pad.

1 . A semiconductor device comprising:
 an external terminal for supplying input power disposed in a sealing body;   an external terminal for supplying reference potential disposed in the sealing body;   an external terminal for output disposed in the sealing body;   a first semiconductor chip sealed in the sealing body;   a second semiconductor chip sealed in the sealing body;   a drain electrode of the first semiconductor chip being electrically connected to the external terminal for supplying input power,   a source electrode of the second semiconductor chip being electrically connected to the external terminal for supplying reference potential,   a source electrode of the first semiconductor chip and a drain electrode of the second semiconductor chip being electrically connected to the external terminal for output, and   a capacitor electrically connected to the external terminal for supplying input power and the external terminal for supplying reference potential,   wherein the drain electrode of the first semiconductor chip and the source electrode of the second semiconductor chip are disposed in the same planar direction, and   the capacitor is disposed on the drain electrode of the first semiconductor chip and the source electrode of the second semiconductor chip.   
     
     
         2 . The semiconductor device according to  claim 1 ,
 wherein the first semiconductor chip, the second semiconductor chip, and the capacitor are sealed by sealant.   
     
     
         3 . The semiconductor device according to  claim 2 ,
 wherein a driver circuit which drives a gate electrode of the first semiconductor chip and a gate electrode of the second semiconductor chip is provided, and   the driver circuit is sealed in the sealing body together with the first semiconductor chip and the second semiconductor chip.   
     
     
         4 . The semiconductor device according to  claim 1 ,
 wherein a Schottky barrier diode electrically connected between the drain electrode of the second semiconductor chip and the source electrode of the second semiconductor chip is provided.