Field effect transistor with trench filled with insulating material and strips of semi-insulating material along trench sidewalls

Abstract

In accordance with an embodiment of the present invention, a MOSFET includes a first semiconductor region having a first surface, a first insulation-filled trench region extending from the first surface into the first semiconductor region, and strips of semi-insulating material along the sidewalls of the first insulation-filled trench region. The strips of semi-insulating material may be insulated from the first semiconductor region.

1 .- 38 . (canceled) 
     
     
         39 . A MOSFET comprising:
 a first semiconductor region having a first surface;   a first insulation-filled trench region extending from the first surface into the first semiconductor region, the first insulation-filled trench region having sidewalls and a bottom surface;   strips of semi-insulating material extending along the sidewalls of the first insulation-filled trench region but not over at least a center portion of the bottom surface of the first insulation-filled trench region, the strips of semi-insulating material being insulated from the first semiconductor region; and   an insulating material extending over at least the center portion of the bottom surface of the first insulation-filled trench region.   
     
     
         40 . The MOSFET of  claim 39  further comprising:
 a second insulation-filled trench region extending from the first surface into the first semiconductor region, the second insulation-filled trench region having sidewalls and a bottom surface, the second insulation-filled trench region having strips of semi-insulating material extending along its sidewalls but not over at least a center portion of the bottom surface of the second insulation-filled trench region, the strips of semi-insulating material being insulated from the first semiconductor region, the second insulation-filled trench region having an insulating material extending over at least the center portion of the bottom surface of the second-insulation-filled trench region, 
 wherein the first and second insulation-filled trench regions are spaced apart in the first semiconductor region to form a drift region therebetween, the volume of each of the first and second insulation-filled trench regions being greater than one-quarter of the volume of the drift region. 
 
     
     
         41 . The MOSFET of  claim 39  further comprising:
 a body region extending from the first surface into the first semiconductor region, the body region being of a conductivity type opposite that of the first semiconductor region; 
 a source region in the body region, the source region being of the same conductivity type as the first semiconductor region; 
 a second trench region extending from the first surface into the first semiconductor region; and 
 a gate in the second trench region extending across a portion of the body region and overlapping the source and the first semiconductor regions such that a channel region extending perpendicularly to the first surface is formed in the body region between the source and first semiconductor regions. 
 
     
     
         42 . The MOSFET of  claim 39  further comprising:
 first and second body regions each extending from the first surface into the first semiconductor region, the first body region being laterally spaced from the second body region to form a JFET region therebetween, the first and second body regions being of a conductivity type opposite that of the first semiconductor region; and 
 first and second source regions in the first and second body regions respectively, the first and second source regions being of the same conductivity type as the first semiconductor region. 
 
     
     
         43 . The MOSFET of  claim 42  further comprising a gate extending over but being insulated from the JFET region and a portion of the first and second body regions, and overlapping the first and second source regions such that a channel region is formed along a body surface of each of the first and second body regions between the corresponding source and JFET regions. 
     
     
         44 . The MOSFET of  claim 42  further comprising:
 a gate extending over but being insulated from each of the first and second body regions such that a channel region is formed along a surface of each of the first and second body regions between the corresponding source and JFET regions, the gate being discontinuous over a surface of the JFET region between the first and second body regions. 
 
     
     
         45 . The MOSFET of  claim 39  wherein the strips of semi-insulating material are from oxygen-doped polysilicon material. 
     
     
         46 . The MOSFET of  claim 39  further comprising a source region, wherein the strips of semi-insulating material are electrically connected to the source regions. 
     
     
         47 . The MOSFET of  claim 39  wherein each of the strips of semi-insulating material is insulated from its surrounding regions. 
     
     
         48 . The MOSFET of  claim 39  wherein each of the strips of semi-insulating material is floating. 
     
     
         49 . The MOSFET of  claim 39  further comprising a drain and a source, each of the strips of semi-insulating material being electrically coupled between the drain and the source. 
     
     
         50 . The MOSFET of  claim 39  further comprising a drain and a source, each of the strips of semi-insulating material being electrically coupled between the drain and the source so that during an operating mode of the MOSFET each of the strips of semi-insulating material acquires a linear voltage gradient from one end of the strip to an opposite end of the strip. 
     
     
         51 . The MOSFET of  claim 39  wherein:
 the first semiconductor region is over and in contact with a second semiconductor region of same conductivity type as the first semiconductor region, the second semiconductor region having a higher doping concentration than the first semiconductor region, and 
 the strips of semi-insulating material extending through the first semiconductor region and terminating in the second semiconductor region. 
 
     
     
         52 . The MOSFET of  claim 39  wherein:
 the first semiconductor region is over and in contact with a second semiconductor region of same conductivity type as the first semiconductor region, the second semiconductor region having a higher doping concentration than the first semiconductor region, and 
 the first insulation-filled trench extending through the first semiconductor region and terminating in the second semiconductor region. 
 
     
     
         53 - 71 . (canceled) 
     
     
         72 . The MOSFET of  claim 39  wherein a resistivity of at least one of the strips of semi-insulating material varies from one end of the strip to an opposite end of the strip proximal the bottom surface of the first insulation-filled trench region.