Autodetection of a pci express device operating at a wireless rf mitigation frequency

Abstract

A computer system that detects for a PCI Express compliant endpoint device is described. Specifically, the computer system clocks transmit and receive circuits at a first frequency and initiates a training sequence. If the endpoint device successfully trains at the first frequency, the endpoint device is PCI Express compliant. Otherwise, the computer system initiates another training sequence at a second frequency.

1 . An apparatus, comprising:
 a receive circuit interface adapted to receive data from an endpoint device;   a transmit circuit interface adapted to transmit data to the endpoint device based on a transmit interface clock signal;   a receive physical layer coupled to the receive circuit interface, the receive physical layer adapted to look for bit patterns in the data received by the receive circuit interface based on a receive interface clock signal;   link training logic coupled to the receive physical layer, the link training logic adapted to detect if the endpoint device is a first endpoint device operating at a first frequency or a second endpoint device operating at a second frequency; and   wireless extension logic coupled to the link training logic, the wireless extension logic adapted to select either the first or the second frequency independently for the receive interface clock signal and the transmit interface clock signal.   
     
     
         2 . The apparatus of  claim 1 , wherein the link training logic adapted to detect if the endpoint device is a first endpoint device operating at a first frequency or a second endpoint device operating at a second frequency comprises: detecting the endpoint device is a first endpoint device operating at a first frequency in response to the receive physical layer successfully finding the bit patterns in the data received by the receive circuit interface when wireless extension logic selects the first frequency for the receive interface clock signal; and detecting the endpoint device is a second endpoint device operating at a second frequency in response to the receive physical layer successfully finding the bit patterns in the data received by the receive circuit interface when wireless extension logic selects the second frequency for the receive interface clock signal. 
     
     
         3 . The apparatus of  claim 1 , wherein the first endpoint device is PCI Express compliant and the second endpoint device is a wireless extension device that is not PCI Express compliant. 
     
     
         4 . The apparatus of  claim 1 , wherein the wireless extension logic is adapted to select the first frequency for the receive interface clock signal by default, the receive physical layer is adapted to look for bit patterns in the data received by the receive circuit interface based on the receive interface clock signal being at the first frequency in response to the wireless extension logic selecting the first frequency for the receive interface clock signal by default, and the link training logic detecting the endpoint device is a first endpoint device operating at the first frequency in response to the receive physical layer indicating the bit patterns are found at the first frequency. 
     
     
         5 . The apparatus of  claim 4 , wherein the wireless extension logic is adapted to select the second frequency for the receive interface clock signal in response to the receive physical layer indicating the bit patterns are not found at the first frequency after N attempts, the receive physical layer is adapted to look for bit patterns in the data received by the receive circuit interface based on the receive interface clock signal being at the second frequency in response to the wireless extension logic selecting the second frequency, and the link training logic detecting the endpoint device is a second endpoint device operating at the second frequency in response to the receive physical layer indicating the bit patterns are found at the second frequency.