Organic light emitting diode display

Abstract

An organic light emitting diode display is disclosed. The organic light emitting diode display includes: a substrate including a first region and a second region, a first gate electrode formed over the first region, a second gate electrode formed over the second region, a first gate insulator formed on the first gate electrode, a second gate insulator formed on the second gate electrode, a first semiconductor layer formed on the first gate insulator, the first semiconductor layer including a first channel region, a second semiconductor layer formed on the second gate insulator, the second semiconductor layer including a second channel region, an interlayer insulator formed over the substrate and over at least part of the first and second semiconductor layers, a first etching stop layer formed over the first channel region and surrounded by the interlayer insulator, a second etching stop layer formed over the second channel region and surrounded by the interlayer insulator, a first source electrode and a first drain electrode contacting the first semiconductor layer through the interlayer insulator, and a second source electrode and a second drain electrode contacting the second semiconductor layer through the interlayer insulator.

1 . An organic light emitting diode display, comprising:
 a substrate including a first region and a second region;   a first gate electrode formed over the first region;   a second gate electrode formed over the second region;   a first gate insulator formed on the first gate electrode;   a second gate insulator formed on the second gate electrode;   a first semiconductor layer formed on the first gate insulator, the first semiconductor layer comprising a first channel region;   a second semiconductor layer formed on the second gate insulator, the second semiconductor layer comprising a second channel region;   an interlayer insulator formed over the substrate and over at least part of the first and second semiconductor layers;   a first etching stop layer formed over the first channel region and surrounded by the interlayer insulator;   a second etching stop layer formed over the second channel region and surrounded by the interlayer insulator;   a first source electrode and a first drain electrode contacting the first semiconductor layer through the interlayer insulator; and   a second source electrode and a second drain electrode contacting the second semiconductor layer through the interlayer insulator.   
     
     
         2 . The organic light emitting diode display of  claim 1 , wherein the first etching stop layer is formed by patterning the interlayer insulator. 
     
     
         3 . The organic light emitting diode display of  claim 1 , further comprising:
 a data line electrically connected with the first source electrode, wherein the data line comprises a lamination structure of a silicon layer pattern injected with high-concentration impurities and a conductive layer pattern.   
     
     
         4 . The organic light emitting diode display of  claim 1 , further comprising:
 a power supply line electrically connected with the second source electrode, wherein the power supply line comprises the lamination structure of the silicon layer pattern injected with high-concentration impurities and the conductive layer pattern.   
     
     
         5 . The organic light emitting diode display of  claim 4 , further comprising:
 a passivation layer formed over at least part of the first source electrode, the first drain electrode, the second source electrode and the second drain electrode; and   an auxiliary power supply line formed on the passivation layer and electrically connected with the power supply line through the passivation layer.   
     
     
         6 . The organic light emitting diode display of  claim 5 , further comprising:
 pixel electrode material layer patterns formed on the auxiliary power supply line.   
     
     
         7 . The organic light emitting diode display of  claim 1 , further comprising:
 a passivation layer formed over at least part of the first source electrode, the first drain electrode, the second source electrode and the second drain electrode; and   a gate line formed over the passivation layer and electrically connected with the first gate electrode through the passivation layer and further through the first gate insulator.   
     
     
         8 . The organic light emitting diode display of  claim 1 , further comprising:
 a passivation layer formed over at least part of the first source electrode, the first drain electrode, the second source electrode and the second drain electrode; and   a first connection wire formed on the passivation layer and electrically connected with the second gate electrode through the passivation layer and further through the second gate insulator.   
     
     
         9 . The organic light emitting diode display of  claim 8 , wherein:
 the first connection wire is electrically connected with the first drain electrode.   
     
     
         10 . The organic light emitting diode display of  claim 4 , further comprising:
 pixel electrode material layer patterns formed on the gate line, the first connection wire, and a second connection wire, respectively.   
     
     
         11 . The organic light emitting diode display of  claim 1 , further comprising:
 a passivation layer formed over at least part of the first source electrode, the first drain electrode, the second source electrode and the second drain electrode; and   the second connection wire formed on the passivation layer and electrically connected with the second drain electrode through the passivation layer.   
     
     
         12 . The organic light emitting diode display of  claim 11 , further comprising:
 a pixel electrode formed on the passivation layer and electrically connected with the second connection wire.   
     
     
         13 . The organic light emitting diode display of  claim 1 , wherein:
 each of the first and second gate electrodes comprises a doped or undoped amorphous silicon layer or a doped or undoped polysilicon layer. The organic light emitting diode display of  claim 1 , wherein:   the substrate further includes a third region, and   the third region includes
 a lower capacitor electrode coplanar with the first gate electrode; 
 a dielectric layer coplanar with the first gate insulator; and 
 a first upper capacitor electrode coplanar with the first semiconductor layer. 
   
     
     
         14 . The organic light emitting diode display of  claim 13 , wherein:
 the lower capacitor electrode is electrically connected with the second gate electrode.   
     
     
         15 . The organic light emitting diode display of  claim 13 , wherein:
 the lower capacitor electrode comprises a doped or undoped amorphous silicon layer or a doped or undoped polysilicon layer.   
     
     
         16 . The organic light emitting diode display of  claim 13 , further comprising:
 a second upper capacitor electrode formed on the interlayer insulator and electrically connected with the first upper capacitor electrode.   
     
     
         17 . The organic light emitting diode display of  claim 16 , wherein:
 the second upper capacitor electrode comprises a lamination structure of a silicon layer pattern injected with high-concentration impurities and a metallic layer pattern.   
     
     
         18 . The organic light emitting diode display of  claim 1 , wherein:
 the first region is a switching thin film transistor region and the second region is a driving thin film transistor region.