Thin film transistor and method of fabricating same

Abstract

The invention provides a thin film transistor that can improve its operating speed by improving crystallinity near a bottom surface of a channel layer. Of laser light irradiated onto an amorphous silicon layer, light transmitted through the amorphous silicon layer is absorbed by a gate electrode 130 and thereby produces heat. Since the gate electrode 130 is made of a titanium layer 102 with a low thermal conductivity, the produced heat is less likely to be transmitted through a gate wiring line 110 and dissipated and thus increases the temperature of the gate electrode 130 . Radiant heat from the gate electrode 130 is provided to a bottom surface of the amorphous silicon layer and thus the amorphous silicon layer is also heated from its bottom surface. As a result, an amorphous silicon layer 106 a melts not only from its top surface but also from its bottom surface and is solidified, whereby crystallization proceeds, and thus, the amorphous silicon layer 106 a turns into a polycrystalline silicon layer 106 b . Hence, the mobility near a bottom surface of the polycrystalline silicon layer 106 b also increases, improving the operating speed of a thin film transistor 100.

1 . A thin film transistor comprising:
 a gate electrode formed on an insulating substrate;   a gate insulating film deposited to cover the insulating substrate having formed thereon the gate electrode;   a channel layer made of a polycrystalline semiconductor layer and formed above the gate electrode with the gate insulating film therebetween, the polycrystalline semiconductor layer being crystallized by irradiating laser light onto an amorphous semiconductor layer; and   a source electrode and a drain electrode formed above the channel layer so as to be overlaid on respective top surfaces of both edges of the channel layer, wherein   at least a surface of the gate electrode is made of a material that allows crystallization of the amorphous semiconductor layer from its bottom surface using the laser light.   
     
     
         2 . The thin film transistor according to  claim 1 , wherein the gate electrode includes a metal that absorbs a portion of the laser light transmitted through the amorphous semiconductor layer and thereby produces radiant heat that allows crystallization of the amorphous semiconductor layer from its bottom surface. 
     
     
         3 . The thin film transistor according to  claim 2 , wherein the gate electrode includes a metal with a thermal conductivity of 138 W/m·K or less. 
     
     
         4 . The thin film transistor according to  claim 2 , wherein the gate electrode includes titanium or molybdenum. 
     
     
         5 . The thin film transistor according to  claim 1 , wherein at least the surface of the gate electrode is made of a metal that reflects a portion of the laser light transmitted through the amorphous semiconductor layer, as light with an intensity at which crystallization of the amorphous semiconductor layer from its bottom surface is allowed. 
     
     
         6 . The thin film transistor according to  claim 5 , wherein at least the surface of the gate electrode is made of a metal with a light reflectivity of 80% or more. 
     
     
         7 . The thin film transistor according to  claim 5 , wherein at least the surface of the gate electrode is made of any one of aluminum, copper, and silver. 
     
     
         8 . The thin film transistor according to  claim 1 , wherein the gate electrode is made of a transparent metal. 
     
     
         9 . The thin film transistor according to  claim 6 , wherein
 the gate electrode includes a first layer; and a second layer formed to be located lower than the first layer, and having a larger width than the first layer,   the first layer is made of a metal with a light reflectivity of 80% or more, and   the second layer is made of a metal with a lower light reflectivity than the first layer, and protruding to left and right of the first layer in a planar view.   
     
     
         10 . A method of fabricating a thin film transistor, the method comprising:
 a gate electrode forming step of forming a gate electrode on an insulating substrate;   a gate insulating film forming step of forming a gate insulating film to cover the insulating substrate having formed thereon the gate electrode;   a laser annealing step of forming an amorphous semiconductor layer on the gate insulating film and irradiating laser light onto the amorphous semiconductor layer to turn the amorphous semiconductor layer into a polycrystalline semiconductor layer;   a channel layer forming step of forming a channel layer made of the polycrystalline semiconductor layer; and   an electrode forming step of forming a source electrode and a drain electrode formed above the channel layer so as to be overlaid on respective top surfaces of both edges of the channel layer, wherein   a wavelength of the laser light is 400 to 800 nm, and   in the laser annealing step, the amorphous semiconductor layer is crystallized from its top surface by being irradiated with the laser light and, at the same time, is crystallized from its bottom surface using a portion of the laser light transmitted through the amorphous semiconductor layer.   
     
     
         11 . The method of fabricating a thin film transistor according to  claim 10 , wherein the gate electrode is formed using a metal with a thermal conductivity of 138 W/m·K or less. 
     
     
         12 . The method of fabricating a thin film transistor according to  claim 10 , wherein the gate electrode is formed using a metal with a light reflectivity of 80% or more. 
     
     
         13 . The method of fabricating a thin film transistor according to  claim 12 , wherein
 at least a surface of the gate electrode is made of copper, and   the wavelength of the laser light is 600 to 800 nm.   
     
     
         14 . The method of fabricating a thin film transistor according to  claim 10 , wherein
 the thin film transistor further includes a gate wiring line connected to the gate electrode, and   the gate electrode forming step includes:
 a depositing step of depositing a stacked film made of a plurality of layers including a first layer made of a metal with a light reflectivity of 80% or more; 
 a resist film forming step of forming a resist film on a surface of the stacked film; 
 a pattern forming step of forming at least a first resist pattern and a second resist pattern by performing exposure using a first half-tone mask, the first resist pattern corresponding to a pattern of the gate electrode and the second resist pattern corresponding to a pattern of the gate wiring line and having a larger film thickness than the first resist pattern; 
 a first etching step of etching the stacked film using the first resist pattern and the second resist pattern as masks, thereby forming a stacked element which is to become the gate electrode, and the gate wiring line; 
 a first pattern removing step of removing the first resist pattern by oxygen plasma; 
 a second etching step of etching the stacked element in turn from its surface using the second resist pattern as a mask, until a surface of the first layer is exposed; and 
 a second pattern removing step of removing the second resist pattern. 
   
     
     
         15 . The method of fabricating a thin film transistor according to  claim 14 , wherein
 the stacked film includes a second layer located lower than the first layer and made of a metal with a lower light reflectivity than the first layer,   in the pattern forming step, the second resist pattern corresponding to the pattern of the gate wiring line, a third resist pattern, and fourth resist patterns are formed using a second half-tone mask, the third resist pattern corresponding to a central portion of the pattern of the gate electrode and having a smaller film thickness than the second resist pattern, and the fourth resist patterns sandwiching the third resist pattern and having a smaller film thickness than the third resist pattern, and   the second etching step includes:
 a third pattern removing step of removing the fourth resist patterns by oxygen plasma; 
 a third etching step of performing etching in turn using the second resist pattern and the third resist pattern as masks, until a surface of the second layer of the stacked element which is to become the gate electrode is exposed; 
 a fourth pattern removing step of removing the third resist pattern by oxygen plasma; and 
 a fourth etching step of performing etching in turn using the second resist pattern as a mask, until the surface of the first layer of the stacked element which is to become the gate electrode is exposed.