Method of making connections in a back-lit circuit

Abstract

A method for forming, on a surface of a thinned-down semiconductor substrate, a contact connected to a metal track of an interconnect stack formed on the opposite surface of the thinned-down substrate, including the steps of: forming, on the side of a first surface of a substrate, an insulating region penetrating into the substrate and coated with a conductive region and with an insulating layer crossed by conductive vias, the vias connecting a metal track of the interconnect stack to the conductive region; gluing the external surface of the interconnect stack on a support and thinning down the substrate; etching the external surface of the thinned-down substrate and stopping on the insulating region; etching the insulating region and stopping on the conductive region; and filling the etched opening with a metal.

1 . A method for forming, on a surface of a thinned-down semiconductor substrate, a contact connected to a metal track of an interconnect stack formed on the opposite surface of the thinned-down substrate, comprising:
 forming, on a side of a first surface of a semiconductor substrate, an insulating region penetrating into the substrate and forming, on the first surface of the semiconductor substrate, a conductive region of polysilicon coated with an insulating layer crossed by conductive vias, said vias connecting a metal track of the interconnect stack to said conductive region, said conductive region being formed at the same time as gates of MOS transistors;   gluing the external surface of the interconnect stack on a support and thinning down the substrate; and   etching the external surface of the thinned-down substrate and stopping on said insulating region; etching said insulating region and stopping on said conductive region; and filling the etched opening with a metal.   
     
     
         2 . The method of  claim 1 , further comprising a method for forming photodetection elements associated with the MOS transistors, on the side of the first surface of the semiconductor substrate, said photodetection elements being intended to be lit from the external surface of the thinned-down substrate. 
     
     
         3 . The method of  claim 2 , wherein the insulating region is formed at the same time as insulation trenches formed around the photodetection elements. 
     
     
         4 . The method of  claim 1 , wherein the conductive vias are formed at the same time as second conductive vias contacting the gates of the MOS transistors. 
     
     
         5 . The method of  claim 1 , further comprising a step of forming a protection layer between the step of etching the external surface of the thinned-down substrate and the step of etching the insulating region. 
     
     
         6 . The method of  claim 5 , wherein the protection layer is made of silicon oxide, of silicon nitride, of silicon oxynitride, or is formed of a multiple-layer silicon oxide—silicon nitride—silicon oxide stack. 
     
     
         7 . The method of  claim 1 , wherein the filling of the etched opening with metal comprises a step of metal deposition on the structure and a step of polishing of the structure enabling to remove the metal which is not in the opening. 
     
     
         8 . A contact structure connecting a first surface of a thinned-down semiconductor substrate to a metal track of an interconnect stack formed on the side of the second surface of the thinned-down substrate, comprising:
 a metal region crossing the substrate;   a conductive region of polysilicon extending over the second surface of the substrate, in contact with the metal region, said conductive region having the same structure as gates of MOS transistors formed on the second surface of the substrate;   a dielectric material layer formed between the conductive region and the metal track; and   conductive vias crossing the dielectric material layer and connecting the metal track to the conductive region.